loadpatents
name:-0.0089619159698486
name:-0.027273178100586
name:-0.0022521018981934
Razdan; Rahul Patent Filings

Razdan; Rahul

Patent Applications and Registrations

Patent applications and USPTO patent grants for Razdan; Rahul.The latest application filed is for "smart search for annotations and inking".

Company Profile
2.19.8
  • Razdan; Rahul - Hyderabad IN
  • RAZDAN; Rahul - Gachibowli IN
  • Razdan; Rahul - Ocala FL
  • Razdan; Rahul - Princeton MA
  • Razdan; Rahul - Princetown MA
  • Razdan; Rahul - Princetwon MA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Smart search for annotations and inking
Grant 10,747,794 - Raj M , et al. A
2020-08-18
Selective consumption of web page data over a data-limited connection
Grant 10,630,755 - Agrawal , et al.
2020-04-21
Smart Search For Annotations And Inking
App 20190213276 - RAJ M; Nithin ;   et al.
2019-07-11
Selective Consumption Of Web Page Data Over A Data-limited Connection
App 20180309817 - AGRAWAL; Deepak ;   et al.
2018-10-25
Shared knowledge about contents
Grant 10,102,194 - Biswas , et al. October 16, 2
2018-10-16
Shared Knowledge About Contents
App 20180165262 - Biswas; Arindam ;   et al.
2018-06-14
Method, Apparatus, And Computer Program Product For Facilitating Marketing Between Businesses
App 20150095141 - Razdan; Rahul ;   et al.
2015-04-02
Validation of Business Continuity Preparedness of a Virtual Machine
App 20130198739 - Razdan; Rahul ;   et al.
2013-08-01
Method and apparatus for enhancing the performance of event driven dynamic simulation of digital circuits based on netlist partitioning techniques
Grant 7,039,887 - Khalil , et al. May 2, 2
2006-05-02
Method and apparatus for enhancing the performance of event driven dynamic simulation of digital circuits based on netlist partitioning techniques
App 20040073876 - Khalil, Nadim ;   et al.
2004-04-15
Method and apparatus for critical and false path verification
Grant 6,714,902 - Chao , et al. March 30, 2
2004-03-30
Method and apparatus for developing multiprocessor cache control protocols using an external acknowledgement signal to set a cache to a dirty state
Grant 6,651,144 - Razdan , et al. November 18, 2
2003-11-18
Method and apparatus for performing speculative memory fills into a microprocessor
Grant 6,493,802 - Razdan , et al. December 10, 2
2002-12-10
Methods and apparatus for minimizing the impact of excessive instruction retrieval
Grant 6,446,143 - Razdan , et al. September 3, 2
2002-09-03
Method and apparatus for developing multiprocessor cache control protocols by presenting a clean victim signal to an external system
Grant 6,397,302 - Razdan , et al. May 28, 2
2002-05-28
Method And Apparatus For Developing Multiprocessore Cache Control Protocols Using A Memory Management System Generating An External Acknowledgement Signal To Set A Cache To A Dirty Coherence State
App 20010029574 - RAZDAN, RAHUL ;   et al.
2001-10-11
Method and apparatus for resolving probes in multi-processor systems which do not use external duplicate tags for probe filtering
Grant 6,295,583 - Razdan , et al. September 25, 2
2001-09-25
Method and apparatus for minimizing dcache index match aliasing using hashing in synonym/subset processing
Grant 6,253,285 - Razdan , et al. June 26, 2
2001-06-26
Distributed data dependency stall mechanism
Grant 6,249,846 - Van Doren , et al. June 19, 2
2001-06-19
Method and apparatus for minimizing pincount needed by external memory control chip for multiprocessors with limited memory size requirements
Grant 6,199,153 - Razdan , et al. March 6, 2
2001-03-06
Method and apparatus for optimizing the performance of LDxL and STxC interlock instructions in the context of a write invalidate protocol
Grant 6,141,734 - Razdan , et al. October 31, 2
2000-10-31
Distributed data dependency stall mechanism
Grant 6,085,294 - Van Doren , et al. July 4, 2
2000-07-04
Method and apparatus for maximizing utilization of an internal processor bus in the context of external transactions running at speeds fractionally greater than internal transaction times
Grant 5,924,120 - Razdan , et al. July 13, 1
1999-07-13
Dynamically programmable reduced instruction set computer with programmable processor loading on program number field and program number register contents
Grant 5,696,956 - Razdan , et al. December 9, 1
1997-12-09
Simulation of circuits
Grant 5,550,760 - Razdan , et al. August 27, 1
1996-08-27
High capacity netlist comparison
Grant 5,463,561 - Razdan October 31, 1
1995-10-31

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