loadpatents
Patent applications and USPTO patent grants for Razavi; Behzad.The latest application filed is for "high-speed latching technique and application to frequency dividers".
Patent | Date |
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CMOS transceiver for communication system Grant 7,986,726 - Razavi , et al. July 26, 2 | 2011-07-26 |
Pulse detector which employs a self-resetting pulse amplifier Grant 7,528,357 - Razavi , et al. May 5, 2 | 2009-05-05 |
High-speed latching technique and application to frequency dividers Grant 7,336,114 - Razavi , et al. February 26, 2 | 2008-02-26 |
High-speed clock and data recovery circuit Grant 7,286,625 - Lee , et al. October 23, 2 | 2007-10-23 |
High-speed latching technique and application to frequency dividers App 20070236267 - Razavi; Behzad ;   et al. | 2007-10-11 |
Apparatus and method for ultra wide band architectures App 20070155348 - Razavi; Behzad ;   et al. | 2007-07-05 |
Method of frequency planning in an ultra wide band system App 20070155350 - Razavi; Behzad ;   et al. | 2007-07-05 |
Data latch Grant 7,149,128 - Razavi , et al. December 12, 2 | 2006-12-12 |
Pulse detector which employs a self-resetting pulse amplifier App 20060273244 - Razavi; Behzad ;   et al. | 2006-12-07 |
Low noise amplifier and related method Grant 7,084,707 - Razavi , et al. August 1, 2 | 2006-08-01 |
Ultrawideband CMOS transceiver App 20060103473 - Razavi; Behzad ;   et al. | 2006-05-18 |
Data Latch App 20060104123 - Razavi; Behzad ;   et al. | 2006-05-18 |
Low Noise Amplifier And Related Method App 20060066410 - Razavi; Behzad ;   et al. | 2006-03-30 |
Low noise mixer circuit with improved gain Grant 6,947,720 - Razavi , et al. September 20, 2 | 2005-09-20 |
Stabilization technique for phase-locked frequency synthesizers Grant 6,864,753 - Lee , et al. March 8, 2 | 2005-03-08 |
Local oscillator architecture to reduce transmitter pulling effect and minimize unwanted sideband Grant 6,850,749 - Soorapanth , et al. February 1, 2 | 2005-02-01 |
Variable gain mixer circuit Grant 6,807,406 - Razavi , et al. October 19, 2 | 2004-10-19 |
40-Gb/s clock and data recovery circuit in 0.18mum technology App 20040155687 - Lee, Jri ;   et al. | 2004-08-12 |
Mixer noise reduction technique Grant 6,748,204 - Razavi , et al. June 8, 2 | 2004-06-08 |
Stabilization technique for phase-locked frequency synthesizers App 20030227332 - Lee, Tai-Cheng ;   et al. | 2003-12-11 |
Differential to single-ended converter with large output swing Grant 6,606,489 - Razavi , et al. August 12, 2 | 2003-08-12 |
Method and apparatus for reducing DC offset Grant 6,509,777 - Razavi , et al. January 21, 2 | 2003-01-21 |
Differential to single-ended converter with large output swing App 20030013419 - Razavi, Behzad ;   et al. | 2003-01-16 |
Local oscillator architecture to reduce transmitter pulling effect and minimize unwanted sideband App 20020180538 - Soorapanth, Chet ;   et al. | 2002-12-05 |
Low noise mixer circuit with improved gain App 20020111152 - Razavi, Behzad ;   et al. | 2002-08-15 |
Method and apparatus for reducing DC reducing offset App 20020097081 - Razavi, Behzad ;   et al. | 2002-07-25 |
Low noise amplifier/mixer/frequency synthesizer circuit for an RF system Grant 5,574,405 - Razavi November 12, 1 | 1996-11-12 |
Digital ECL bipolar logic gates suitable for low-voltage operation Grant 5,289,055 - Razavi February 22, 1 | 1994-02-22 |
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