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name:-0.0085480213165283
name:-0.018357038497925
name:-0.00037717819213867
Raza; Syed Babar Patent Filings

Raza; Syed Babar

Patent Applications and Registrations

Patent applications and USPTO patent grants for Raza; Syed Babar.The latest application filed is for "re-enumeration of usb 3.0 compatible devices".

Company Profile
0.20.8
  • Raza; Syed Babar - San Jose CA
  • Raza; Syed Babar - Milpitas CA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Memory interface configurable for asynchronous and synchronous operation and for accessing storage from any clock domain
Grant 10,456,819 - Khodabandehlou , et al. Oc
2019-10-29
Re-enumeration Of Usb 3.0 Compatible Devices
App 20180011718 - Bajpai; Pradeep Kumar ;   et al.
2018-01-11
Re-enumeration of USB 3.0 compatible devices
Grant 9,804,859 - Bajpai , et al. October 31, 2
2017-10-31
Memory interface configurable for asynchronous and synchronous operation and for accessing storage from any clock
Grant 9,734,877 - Khodabandehlou , et al. August 15, 2
2017-08-15
Memory Interface Configurable For Asynchronous And Synchronous Operation And For Accessing Storage From Any Clock
App 20170165730 - Khodabandehlou; Hamid ;   et al.
2017-06-15
Memory Interface Configurable For Asynchronous And Synchronous Operation And For Accessing Storage From Any Clock Domain
App 20170011786 - Khodabandehlou; Hamid ;   et al.
2017-01-12
Re-enumeration Of Usb 3.0 Compatible Devices
App 20150100707 - Bajpai; Pradeep ;   et al.
2015-04-09
Host communication device and method with data transfer scheduler
Grant 8,996,772 - Raza , et al. March 31, 2
2015-03-31
Methods, systems, and physical computer-readable media for multiplexing a single end-point memory structure between USB interfaces
Grant 8,972,621 - Raza , et al. March 3, 2
2015-03-03
Re-enumeration of USB 3.0 compatible devices
Grant 8,843,664 - Bajpai , et al. September 23, 2
2014-09-23
Arbitration method for programmable multiple clock domain bi-directional interface
Grant 8,589,632 - Gupta , et al. November 19, 2
2013-11-19
Re-enumeration Of Usb 3.0 Compatible Devices
App 20130132614 - Bajpai; Pradeep Kumar ;   et al.
2013-05-23
Busy detection logic for asynchronous communication port
Grant 8,370,543 - Raza , et al. February 5, 2
2013-02-05
Memory interface configurable for asynchronous and synchronous operation and for accessing storage from any clock domain
Grant 8,266,405 - Khodabandehlou , et al. September 11, 2
2012-09-11
Memory Interface Configurable For Asynchronous And Synchronous Operation And For Accessing Storage From Any Clock
App 20120096301 - Khodabandehlou; Hamid ;   et al.
2012-04-19
Busy detection logic for asynchronous communication port
Grant 8,145,809 - Raza , et al. March 27, 2
2012-03-27
Implementation of logical endpoints in USB device
Grant 8,099,534 - Raza , et al. January 17, 2
2012-01-17
Architectures for supporting communication and access between multiple host devices and one or more common functions
Grant 8,090,894 - Khodabandehlou , et al. January 3, 2
2012-01-03
Devices and methods for sharing common target device with two different hosts according to common communication protocol
Grant 7,895,387 - Khodabandehlou , et al. February 22, 2
2011-02-22
Input latch circuit and method
Grant 7,672,190 - Raza , et al. March 2, 2
2010-03-02
Memory Interface Configurable for Asynchronous and Synchronous Operation and for Accessing Storage from any Clock Domain
App 20080148085 - Khodabandehlou; Hamid ;   et al.
2008-06-19
High speed configuration independent programmable macrocell
Grant RE37,577 - Liu , et al. March 12, 2
2002-03-12

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