loadpatents
name:-0.025080919265747
name:-0.015216827392578
name:-0.0025279521942139
Ravi; Srivaths Patent Filings

Ravi; Srivaths

Patent Applications and Registrations

Patent applications and USPTO patent grants for Ravi; Srivaths.The latest application filed is for "testing of integrated circuits during at-speed mode of operation".

Company Profile
1.16.19
  • Ravi; Srivaths - Bangalore IN
  • Ravi; Srivaths - Karnataka IN
  • Ravi; Srivaths - Plainsboro NJ
  • Ravi; Srivaths - Princeton NJ
  • Ravi, Srivaths - US
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Testing of integrated circuits during at-speed mode of operation
Grant 11,333,707 - Agarwal , et al. May 17, 2
2022-05-17
Testing Of Integrated Circuits During At-speed Mode Of Operation
App 20200132763 - Agarwal; Khushboo ;   et al.
2020-04-30
Testing Of Integrated Circuits During At-speed Mode Of Operation
App 20150212152 - Agarwal; Khushboo ;   et al.
2015-07-30
Scan compression architecture with bypassable scan chains for low test mode power
Grant 8,856,601 - Ravi , et al. October 7, 2
2014-10-07
Circuits and methods for dynamic allocation of scan test resources
Grant 8,839,063 - Parekhji , et al. September 16, 2
2014-09-16
Circuits And Methods For Dynamic Allocation Of Scan Test Resources
App 20140208177 - Parekhji; Rubin Ajit ;   et al.
2014-07-24
Low overhead and timing improved architecture for performing error checking and correction for memories and buses in system-on-chips, and other circuits, systems and processes
Grant 8,671,329 - Kumar , et al. March 11, 2
2014-03-11
Low Overhead And Timing Improved Architecture For Performing Error Checking And Correction For Memories And Buses In System-on-chips, And Other Circuits, Systems And Processes
App 20130246889 - Kumar; Sanjay ;   et al.
2013-09-19
Hybrid test compression architecture using multiple codecs for low pin count and high compression devices
Grant 8,527,821 - Shah , et al. September 3, 2
2013-09-03
Scan Compression Architecture with Bypassable Scan Chains for Low Test Mode Power
App 20130159800 - Ravi; Srivaths ;   et al.
2013-06-20
Low overhead and timing improved architecture for performing error checking and correction for memories and buses in system-on-chips, and other circuits, systems and processes
Grant 8,438,344 - Kumar , et al. May 7, 2
2013-05-07
Hybrid Test Compression Architecture Using Multiple Codecs For Low Pin Count And High Compression Devices
App 20120304031 - Shah; Malav Shrikant ;   et al.
2012-11-29
On-chip seed generation using boolean functions for LFSR re-seeding based logic BIST techniques for low cost field testability
Grant 8,286,042 - Gangasani , et al. October 9, 2
2012-10-09
Enhanced control in scan tests of integrated circuits with partitioned scan chains
Grant 8,205,125 - Hales , et al. June 19, 2
2012-06-19
Low Overhead And Timing Improved Architecture For Performing Error Checking And Correction For Memories And Buses In System-on-chips, And Other Circuits, Systems And Processes
App 20110225475 - Kumar; Sanjay ;   et al.
2011-09-15
Enhanced Control In Scan Tests Of Integrated Circuits With Partitioned Scan Chains
App 20110099442 - Hales; Alan David ;   et al.
2011-04-28
On-Chip Seed Generation Using Boolean Functions for LFSR Re-Seeding Based Logic BIST Techniques for Low Cost Field Testability
App 20100218059 - Gangasani; Swathi ;   et al.
2010-08-26
Voice-based multimodal speaker authentication using adaptive training and applications thereof
Grant 7,529,669 - Ravi , et al. May 5, 2
2009-05-05
Voice-based Multimodal Speaker Authentication Using Adaptive Training And Applications Thereof
App 20080059176 - RAVI; Srivaths ;   et al.
2008-03-06
System-level test architecture for delivery of compressed tests
Grant 7,278,123 - Ravi , et al. October 2, 2
2007-10-02
Power estimation employing cycle-accurate functional descriptions
Grant 7,260,809 - Ravi , et al. August 21, 2
2007-08-21
Apparatus and Method for Improving Security of a Bus Based System Through Communication Architecture Enhancements
App 20070101424 - Ravi; Srivaths ;   et al.
2007-05-03
Flexible crossbar switching fabric
Grant 7,173,906 - Ravi , et al. February 6, 2
2007-02-06
Power Estimation Employing Cycle-accurate Functional Descriptions
App 20070022395 - Ravi; Srivaths ;   et al.
2007-01-25
Method and apparatus for efficient register-transfer level (RTL) power estimation
Grant 7,134,100 - Ravi , et al. November 7, 2
2006-11-07
Power estimation through power emulation
App 20060058994 - Ravi; Srivaths ;   et al.
2006-03-16
Tamper resistant secure architecture
App 20050204155 - Ravi, Srivaths ;   et al.
2005-09-15
System-level test architecture for delivery of compressed tests
App 20050097413 - Ravi, Srivaths ;   et al.
2005-05-05
Method and apparatus for efficient register-transfer level (RTL) power estimation
App 20040019859 - Ravi, Srivaths ;   et al.
2004-01-29
Techniques for efficient security processing
App 20030142818 - Raghunathan, Anand ;   et al.
2003-07-31
Flexible crossbar switching fabric
App 20030063605 - Ravi, Srivaths ;   et al.
2003-04-03

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.

© 2024 USPTO.report | Privacy Policy | Resources | RSS Feed of Trademarks | Trademark Filings Twitter Feed