loadpatents
name:-0.029953002929688
name:-0.025511980056763
name:-0.0019359588623047
Ravasio; Roberto Patent Filings

Ravasio; Roberto

Patent Applications and Registrations

Patent applications and USPTO patent grants for Ravasio; Roberto.The latest application filed is for "method for performing error corrections of digital information codified as a symbol sequence".

Company Profile
1.27.29
  • Ravasio; Roberto - Ponte S. Pietro IT
  • Ravasio; Roberto - Ponte San Pietro IT
  • Ravasio; Roberto - Presezzo IT
  • Ravasio; Roberto - I-24036 Ponte San Pietro BG
  • Ravasio; Roberto - 24030 Presezzo IT
  • Ravasio; Roberto - Presezzo BG
  • Ravasio; Roberto - PresezzoBG
  • Ravasio; Roberto - Ponte San Pietro BG
  • Ravasio; Roberto - Carvico IT
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Method for performing error corrections of digital information codified as a symbol sequence
Grant 10,630,317 - Lunelli , et al.
2020-04-21
Method For Performing Error Corrections Of Digital Information Codified As A Symbol Sequence
App 20150143206 - Lunelli; Massimiliano ;   et al.
2015-05-21
Method for performing error corrections of digital information codified as a symbol sequence
Grant 8,966,335 - Lunelli , et al. February 24, 2
2015-02-24
Configuration of a multilevel flash memory device
Grant 8,572,361 - Bovino , et al. October 29, 2
2013-10-29
Reading method of a memory device with embedded error-correcting code and memory device with embedded error-correcting code
Grant 8,347,201 - Marelli , et al. January 1, 2
2013-01-01
Non-volatile, electrically-programmable memory
Grant 8,065,467 - Micheloni , et al. November 22, 2
2011-11-22
Configuration Of A Multilevel Flash Memory Device
App 20110167206 - Bovino; Angelo ;   et al.
2011-07-07
Reading Method Of A Memory Device With Embedded Error-correcting Code And Memory Device With Embedded Error-correcting Code
App 20110167318 - Marelli; Alessia ;   et al.
2011-07-07
Memory device and method providing logic connections for data transfer
Grant 7,940,575 - Ravasio , et al. May 10, 2
2011-05-10
Configuration of a multi-level flash memory device
Grant 7,937,576 - Bovino , et al. May 3, 2
2011-05-03
Reading method of a memory device with embedded error-correcting code and memory device with embedded error-correcting code
Grant 7,908,543 - Marelli , et al. March 15, 2
2011-03-15
Integrated circuit having a memory cell arrangement and method for reading a memory cell state using a plurality of partial readings
Grant 7,800,943 - Ravasio , et al. September 21, 2
2010-09-21
Integrated memory system
Grant 7,730,357 - Micheloni , et al. June 1, 2
2010-06-01
Method of programming cells of a NAND memory device
Grant 7,719,894 - Crippa , et al. May 18, 2
2010-05-18
Memory Device and Method Providing Logic Connections for Data Transfer
App 20090244949 - Ravasio; Roberto ;   et al.
2009-10-01
Memory with embedded error correction codes
Grant 7,581,153 - Micheloni , et al. August 25, 2
2009-08-25
Integrated Circuit Having a Memory Cell Arrangement and Method for Reading a Memory Cell State Using a Plurality of Partial Readings
App 20090185425 - Ravasio; Roberto ;   et al.
2009-07-23
Method for compacting the erased threshold voltage distribution of flash memory devices during writing operations
Grant 7,529,136 - Micheloni , et al. May 5, 2
2009-05-05
Flash memory device with NAND architecture with reduced capacitive coupling effect
Grant 7,394,694 - Micheloni , et al. July 1, 2
2008-07-01
Method for accessing a multilevel nonvolatile memory device of the flash NAND type
Grant 7,382,660 - Bovino , et al. June 3, 2
2008-06-03
Method for performing error corrections of digital information codified as a symbol sequence
App 20080104477 - Lunelli; Massimiliano ;   et al.
2008-05-01
Double page programming system and method
Grant 7,366,014 - Micheloni , et al. April 29, 2
2008-04-29
NAND flash memory with erase verify based on shorter evaluation time
Grant 7,362,616 - Bovino , et al. April 22, 2
2008-04-22
Method Of Fixing A Read Evaluation Time Or The Difference Between A Read Charge Voltage And A Read Discriminating Voltage In A Non-volatile Nand Type Memory Device
App 20080062767 - CRIPPA; Luca ;   et al.
2008-03-13
Nand Flash Memory Device With Ecc Protected Reserved Area For Non-volatile Storage Of Redundancy Data
App 20080065937 - Micheloni; Rino ;   et al.
2008-03-13
Non-volatile, Electrically-programmable Memory
App 20080052458 - Micheloni; Rino ;   et al.
2008-02-28
Method Of Programming Cells Of A Nand Memory Device
App 20080049511 - CRIPPA; LUCA ;   et al.
2008-02-28
Method For Compacting The Erased Threshold Voltage Distribution Of Flash Memory Devices During Writing Operations
App 20080049521 - Micheloni; Rino ;   et al.
2008-02-28
Page buffer circuit and method for multi-level NAND programmable memories
Grant 7,336,538 - Crippa , et al. February 26, 2
2008-02-26
Method for performing error corrections of digital information codified as a symbol sequence
Grant 7,328,397 - Lunelli , et al. February 5, 2
2008-02-05
Reading method of a memory device with embedded error-correcting code and memory device with embedded error-correcting code
App 20070234164 - Marelli; Alessia ;   et al.
2007-10-04
Memory system comprising a semiconductor memory
Grant 7,221,602 - Micheloni , et al. May 22, 2
2007-05-22
Method For Accessing A Multilevel Nonvolatile Memory Device Of The Flash Nand Type
App 20070047299 - Bovino; Angelo ;   et al.
2007-03-01
Configuration Of A Multilevel Flash Memory Device
App 20070038852 - Bovino; Angelo ;   et al.
2007-02-15
Page buffer circuit and method for multi-level NAND programmable memories
App 20070030735 - Crippa; Luca ;   et al.
2007-02-08
Double page programming system and method
App 20070030732 - Micheloni; Rino ;   et al.
2007-02-08
Nand flash memory with erase verify based on shorter evaluation time
App 20070030730 - Bovino; Angelo ;   et al.
2007-02-08
Flash memory device with NAND architecture with reduced capacitive coupling effect
App 20060285387 - Micheloni; Rino ;   et al.
2006-12-21
Method and device for programming an electrically programmable non-volatile semiconductor memory
Grant 7,068,540 - Micheloni , et al. June 27, 2
2006-06-27
Non volatile memory device including a predetermined number of sectors
Grant 7,035,142 - Khouri , et al. April 25, 2
2006-04-25
Method and device for programming an electrically programmable non-volatile semiconductor memory
Grant 7,031,193 - Micheloni , et al. April 18, 2
2006-04-18
Method for error control in multilevel cells with configurable number of stored bits
Grant 7,017,099 - Micheloni , et al. March 21, 2
2006-03-21
Memory with embedded error correction codes
App 20060059406 - Micheloni; Rino ;   et al.
2006-03-16
Method and system for correcting low latency errors in read and write non volatile memories, particularly of the flash type
App 20060010363 - Marelli; Alessia ;   et al.
2006-01-12
Method and system for correcting errors in electronic memory devices
App 20060005109 - Marelli; Alessia ;   et al.
2006-01-05
Circuit for programming a non-volatile memory device with adaptive program load control
Grant 6,956,773 - Micheloni , et al. October 18, 2
2005-10-18
Method for performing error corrections of digital information codified as a symbol sequence
App 20050050434 - Lunelli, Massimiliano ;   et al.
2005-03-03
Integrated memory system
App 20040230869 - Micheloni, Rino ;   et al.
2004-11-18
Memory system comprising a semiconductor memory
App 20040181643 - Micheloni, Rino ;   et al.
2004-09-16
Non volatile memory device including a predetermined number of sectors
App 20040170057 - Khouri, Osama ;   et al.
2004-09-02
Method and device for programming an electrically programmable non-volatile semiconductor memory
App 20040170061 - Micheloni, Rino ;   et al.
2004-09-02
Method and device for programming an electrically programmable non-volatile semiconductor memory
App 20040170062 - Micheloni, Rino ;   et al.
2004-09-02
Circuit for programming a non-volatile memory device with adaptive program load control
App 20040145947 - Micheloni, Rino ;   et al.
2004-07-29
Method for error control in multilevel cells with configurable number of stored bits
App 20030018861 - Micheloni, Rino ;   et al.
2003-01-23

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