loadpatents
Patent applications and USPTO patent grants for Rao; Chethan.The latest application filed is for "phase interpolator with phase traversing for delay-locked loop".
Patent | Date |
---|---|
Phase interpolator with phase traversing for delay-locked loop Grant 9,461,655 - Boecker , et al. October 4, 2 | 2016-10-04 |
Phase Interpolator with Phase Traversing for Delay-Locked Loop App 20150326229 - BOECKER; Charles W. ;   et al. | 2015-11-12 |
Low Noise Bias Circuit For A Pll Oscillator App 20130076450 - Rao; Chethan ;   et al. | 2013-03-28 |
Low jitter large frequency tuning LC PLL for multi-speed clocking applications Grant 8,044,724 - Rao , et al. October 25, 2 | 2011-10-25 |
Low Jitter Large Frequency Tuning Lc Pll For Multi-speed Clocking Applications App 20100073051 - Rao; Chethan ;   et al. | 2010-03-25 |
uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.
While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.
All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.