loadpatents
name:-0.034446001052856
name:-0.025968074798584
name:-0.023316144943237
Rangachari; Sundarrajan Patent Filings

Rangachari; Sundarrajan

Patent Applications and Registrations

Patent applications and USPTO patent grants for Rangachari; Sundarrajan.The latest application filed is for "methods and systems for generation of balanced secondary clocks from root clock".

Company Profile
19.24.28
  • Rangachari; Sundarrajan - Tamil Nadu IN
  • RANGACHARI; SUNDARRAJAN - BANGALORE IN
  • RANGACHARI; Sundarrajan - Trichy IN
  • Rangachari; Sundarrajan - Karnataka IN
  • Rangachari; Sundarrajan - Horamavu IN
  • Rangachari; Sundarrajan - Tamilnadu IN
  • Rangachari; Sundarrajan - Bengaluru IN
  • Rangachari; Sundarrajan - Ulsoor IN
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Methods and Systems for Generation of Balanced Secondary Clocks from Root Clock
App 20220271762 - Vs; Aswath ;   et al.
2022-08-25
Methods and systems for generation of balanced secondary clocks from root clock
Grant 11,422,586 - Vs , et al. August 23, 2
2022-08-23
Transistion Fault Testing Of Funtionally Asynchronous Paths In An Integrated Circuit
App 20220196738 - NARAYANAN; PRAKASH ;   et al.
2022-06-23
Low Power Digital Modes For Duty-cycled Integrated Transceivers
App 20220182098 - RANGACHARI; Sundarrajan ;   et al.
2022-06-09
Self test for safety logic
Grant 11,320,488 - Rangachari , et al. May 3, 2
2022-05-03
Transistion fault testing of funtionally asynchronous paths in an integrated circuit
Grant 11,300,615 - Narayanan , et al. April 12, 2
2022-04-12
Low-complexity Inverse Sinc For Rf Sampling Transmitters
App 20220029644 - Balakrishnan; Jaiganesh ;   et al.
2022-01-27
Transition fault test (TFT) clock receiver system
Grant 11,204,385 - Kale , et al. December 21, 2
2021-12-21
Low-complexity inverse sinc for RF sampling transmitters
Grant 11,171,674 - Balakrishnan , et al. November 9, 2
2021-11-09
Frequency-domain IQ mismatch estimation
Grant 11,095,485 - Tangudu , et al. August 17, 2
2021-08-17
Self Test for Safety Logic
App 20210148976 - Rangachari; Sundarrajan ;   et al.
2021-05-20
Transition Fault Test (tft) Clock Receiver System
App 20210148974 - Kale; Gautam Sanjy ;   et al.
2021-05-20
Low-complexity Inverse Sinc For Rf Sampling Transmitters
App 20210083695 - Balakrishnan; Jaiganesh ;   et al.
2021-03-18
Self test for safety logic
Grant 10,935,602 - Rangachari , et al. March 2, 2
2021-03-02
Digital clock generation with randomized division of a source clock
Grant 10,911,057 - Gunturi , et al. February 2, 2
2021-02-02
Dithered M by N clock dividers
Grant 10,812,091 - Rangachari , et al. October 20, 2
2020-10-20
Dithered M By N Clock Dividers
App 20200228126 - RANGACHARI; Sundarrajan ;   et al.
2020-07-16
Frequency-domain Iq Mismatch Estimation
App 20200177417 - TANGUDU; Jawaharlal ;   et al.
2020-06-04
Clock Pulse Generator
App 20200177170 - KALE; Gautam Sanjay ;   et al.
2020-06-04
Dithered M By N Clock Dividers
App 20200162083 - RANGACHARI; Sundarrajan ;   et al.
2020-05-21
Digital Clock Generation With Randomized Division Of A Source Clock
App 20200153444 - Gunturi; Sarma Sundareswara ;   et al.
2020-05-14
Dithered M by N clock dividers
Grant 10,651,863 - Rangachari , et al.
2020-05-12
Clock pulse generator
Grant 10,651,836 - Kale , et al.
2020-05-12
Digital downconverter with digital oscillator frequency error correction
Grant 10,574,246 - Gunturi , et al. Feb
2020-02-25
Transformation based filter for interpolation or decimation
Grant 10,396,829 - Balakrishnan , et al. A
2019-08-27
Transistion Fault Testing Of Funtionally Asynchronous Paths In An Integrated Circuit
App 20190204387 - NARAYANAN; PRAKASH ;   et al.
2019-07-04
Digital Downconverter With Digital Oscillator Frequency Error Correction
App 20190207612 - GUNTURI; Sarma Sundareswara ;   et al.
2019-07-04
Multiplier-based Programmable Filters
App 20190181842 - RANGACHARI; Sundarrajan ;   et al.
2019-06-13
Memory compression operable for non-contiguous write/read addresses
Grant 10,320,412 - Rangachari , et al.
2019-06-11
Multiplier-based programmable filters
Grant 10,305,451 - Rangachari , et al.
2019-05-28
Transformation Based Filter for Interpolation or Decimation
App 20180367169 - Balakrishnan; Jaiganesh ;   et al.
2018-12-20
Transformation based filter for interpolation or decimation
Grant 10,090,866 - Balakrishnan , et al. October 2, 2
2018-10-02
Self Test for Safety Logic
App 20180252771 - Rangachari; Sundarrajan ;   et al.
2018-09-06
Transformation Based Filter For Interpolation Or Decimation
App 20180191383 - Balakrishnan; Jaiganesh ;   et al.
2018-07-05
Memory Compression Operable For Non-contiguous Write/read Addresses
App 20180175880 - RANGACHARI; Sundarrajan ;   et al.
2018-06-21
Self test for safety logic
Grant 9,964,597 - Rangachari , et al. May 8, 2
2018-05-08
Memory compression operable for non-contiguous write/read addresses
Grant 9,929,744 - Rangachari , et al. March 27, 2
2018-03-27
Self Test for Safety Logic
App 20180059180 - Rangachari; Sundarrajan ;   et al.
2018-03-01
Memory Compression Operable For Non-contiguous Write/read Addresses
App 20180041222 - RANGACHARI; Sundarrajan ;   et al.
2018-02-08
Systems and methods of variable fractional rate digital resampling
Grant 9,531,343 - Tangudu , et al. December 27, 2
2016-12-27
Direct over-sampled pulse shaping circuit with flip flops and LUT
Grant 9,491,012 - Balakrishnan , et al. November 8, 2
2016-11-08
Systems and Methods of Variable Fractional Rate Digital Resampling
App 20160277007 - Tangudu; Jawaharlal ;   et al.
2016-09-22
Systems and methods of low power decimation filter for sigma delta ADC
Grant 9,391,634 - Rangachari July 12, 2
2016-07-12
Weather Band Receiver
App 20160127161 - Murali; Sriram ;   et al.
2016-05-05
Memory Compression Operable for Non-contiguous write/read Addresses
App 20160110113 - Rangachari; Sundarrajan ;   et al.
2016-04-21
Current reduction in digital circuits
Grant 9,025,705 - Rangachari , et al. May 5, 2
2015-05-05
Apparatus and method for reducing interference signals in an integrated circuit using multiphase clocks
Grant 8,842,766 - Prathapan , et al. September 23, 2
2014-09-23
Current Reduction In Digital Circuits
App 20140098908 - RANGACHARI; SUNDARRAJAN ;   et al.
2014-04-10
System And Method For Mitigating Frequency Mismatch In A Receiver System
App 20130066451 - Ganesan; Aravind Na ;   et al.
2013-03-14
Apparatus And Method For Reducing Interference Signals In An Integrated Circuit Using Multiphase Clocks
App 20110241747 - PRATHAPAN; INDU ;   et al.
2011-10-06

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