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Patent applications and USPTO patent grants for Ranade; Rajiv.The latest application filed is for "method to fill deep trench structures with void-free polysilicon or silicon".
Patent | Date |
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Method for dry etching deep trenches in a substrate Grant 6,821,900 - Athavale , et al. November 23, 2 | 2004-11-23 |
Method to fill deep trench structures with void-free polysilicon or silicon Grant 6,809,005 - Ranade , et al. October 26, 2 | 2004-10-26 |
Method To Fill Deep Trench Structures With Void-free Polysilicon Or Silicon App 20040180510 - Ranade, Rajiv ;   et al. | 2004-09-16 |
Circuit with buried strap including liner Grant 6,768,155 - JaiPrakash , et al. July 27, 2 | 2004-07-27 |
Circuit with buried strap including liner App 20040000683 - JaiPrakash, Venkatachalam C. ;   et al. | 2004-01-01 |
Method of manufacturing circuit with buried strap including a liner Grant 6,605,504 - JaiPrakash , et al. August 12, 2 | 2003-08-12 |
Method of deep trench formation with improved profile control and surface area Grant 6,544,838 - Ranade , et al. April 8, 2 | 2003-04-08 |
Method of deep trench formation with improved profile control and surface area App 20020132422 - Ranade, Rajiv ;   et al. | 2002-09-19 |
Method of forming deep trench capacitors Grant 6,103,585 - Michaelis , et al. August 15, 2 | 2000-08-15 |
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