| Patent | Date |
|---|
Transistor With Embedded Isolation Layer In Bulk Substrate
App 20220262900 - RANA; Uzma ; et al. | 2022-08-18 |
Transistor with embedded isolation layer in bulk substrate
Grant 11,380,759 - Rana , et al. July 5, 2 | 2022-07-05 |
Bulk Wafer Switch Isolation
App 20220208599 - RANA; Uzma ; et al. | 2022-06-30 |
Bulk wafer switch isolation
Grant 11,322,387 - Rana , et al. May 3, 2 | 2022-05-03 |
Bulk Wafer Switch Isolation
App 20220115262 - RANA; Uzma ; et al. | 2022-04-14 |
Transistor With Embedded Isolation Layer In Bulk Substrate
App 20220028971 - RANA; Uzma ; et al. | 2022-01-27 |
III-V lasers with integrated silicon photonic circuits
Grant 9,966,735 - Cheng , et al. May 8, 2 | 2018-05-08 |
Planar III-V field effect transistor (FET) on dielectric layer
Grant 9,882,021 - Cheng , et al. January 30, 2 | 2018-01-30 |
Selective dopant junction for a group III-V semiconductor device
Grant 9,679,775 - Chan , et al. June 13, 2 | 2017-06-13 |
Selective Dopant Junction For A Group Iii-v Semiconductor Device
App 20160329211 - Chan; Kevin K. ; et al. | 2016-11-10 |
Iii-v Lasers With Integrated Silicon Photonic Circuits
App 20160301192 - Cheng; Cheng-Wei ; et al. | 2016-10-13 |
Selective Dopant Junction For A Group Iii-v Semiconductor Device
App 20160254150 - Chan; Kevin K. ; et al. | 2016-09-01 |
Selective dopant junction for a group III-V semiconductor device
Grant 9,418,846 - Chan , et al. August 16, 2 | 2016-08-16 |
III-V lasers with integrated silicon photonic circuits
Grant 9,407,066 - Cheng , et al. August 2, 2 | 2016-08-02 |
Planar Iii-v Field Effect Transistor (fet) On Dielectric Layer
App 20160172465 - Cheng; Cheng-Wei ; et al. | 2016-06-16 |
Planar III-V field effect transistor (FET) on dielectric layer
Grant 9,287,115 - Cheng , et al. March 15, 2 | 2016-03-15 |
Planar Iii-v Field Effect Transistor (fet) On Dielectric Layer
App 20150262818 - Cheng; Cheng-Wei ; et al. | 2015-09-17 |
Silicon Substrate Preparation For Selective Iii-v Epitaxy
App 20150255281 - Bruce; Robert L. ; et al. | 2015-09-10 |
Interface engineering to optimize metal-III-V contacts
Grant 9,105,571 - Lavoie , et al. August 11, 2 | 2015-08-11 |
Semiconductor Device Having A Iii-v Crystalline Compound Material Selectively Grown On The Bottom Of A Space Formed In A Single Element Substrate.
App 20150048423 - Bruce; Robert L. ; et al. | 2015-02-19 |
A Method For Forming A Crystalline Compound Iii-v Material On A Single Element Substrate
App 20150048422 - Bruce; Robert L. ; et al. | 2015-02-19 |
Iii-v Lasers With Integrated Silicon Photonic Circuits
App 20150030047 - Cheng; Cheng-Wei ; et al. | 2015-01-29 |
III-V finFETs on silicon substrate
Grant 8,937,299 - Basu , et al. January 20, 2 | 2015-01-20 |
Iii-v Finfets On Silicon Substrate
App 20140264446 - BASU; ANIRBAN ; et al. | 2014-09-18 |
Iii-v Finfets On Silicon Substrate
App 20140264607 - Basu; Anirban ; et al. | 2014-09-18 |
Interface Engineering to Optimize Metal-III-V Contacts
App 20130200443 - Lavoie; Christian ; et al. | 2013-08-08 |
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