Ramji; Shyam

Patent Applications and Registrations

Patent applications and USPTO patent grants for Ramji; Shyam.The latest application filed is for "fraud detection using multi-task learning and/or deep learning".

Company Profile

17.47.43

Ramji; Shyam - Lagrange NY
RAMJI; Shyam - LeGrange NY
Ramji; Shyam - Lagrangeville NY
Ramji; Shyam - Langrangeville NY
Ramji; Shyam - Lagrangevill NY
Ramji; Shyam - Hopewell Junction NY
Ramji; Shyam - Fishkill NY
Ramji, Shyam - Yorktown Heights NY

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Fraud Detection Using Multi-task Learning And/or Deep Learning App 20220012741 - Raj; Jeetu ; et al.	2022-01-13
Streamlining Data Processing Optimizations For Machine Learning Workloads App 20210374602 - ZHANG; Qi ; et al.	2021-12-02
Memory element graph-based placement in integrated circuit design Grant 11,080,443 - Kim , et al. August 3, 2	2021-08-03
Hierarchy-driven logical and physical synthesis co-optimization Grant 10,891,411 - Nam , et al. January 12, 2	2021-01-12
Propagating constants of structured soft blocks while preserving the relative placement structure Grant 10,803,224 - Shah , et al. October 13, 2	2020-10-13
Autonomous placement to satisfy self-aligned double patterning constraints Grant 10,796,064 - Xiang , et al. October 6, 2	2020-10-06
Model-based refinement of the placement process in integrated circuit generation Grant 10,762,271 - Kim , et al. Sep	2020-09-01
Large cluster persistence during placement optimization of integrated circuit designs Grant 10,685,160 - Kim , et al.	2020-06-16
Hierarchy-driven Logical And Physical Synthesis Co-optimization App 20200175122 - Nam; Gi-Joon ; et al.	2020-06-04
Propagating Constants Of Structured Soft Blocks While Preserving The Relative Placement Structure App 20200159882 - Shah; Salim ; et al.	2020-05-21
Enhancing stability of half perimeter wire length (HPWL)-driven analytical placement Grant 10,635,773 - Kim , et al.	2020-04-28
Memory Element Graph-based Placement In Integrated Circuit Design App 20200125779 - Kim; Myung-Chul ; et al.	2020-04-23
Enhancing Stability Of Half Perimeter Wire Length (hpwl)-driven Analytical Placement App 20200125690 - Kim; Myung-Chul ; et al.	2020-04-23
Model-based Refinement Of The Placement Process In Integrated Circuit Generation App 20200104453 - Kim; Myung-Chul ; et al.	2020-04-02
Autonomous Placement To Satisfy Self-aligned Double Patterning Constraints App 20200057836 - Xiang; Hua ; et al.	2020-02-20
Memory element graph-based placement in integrated circuit design Grant 10,558,775 - Kim , et al. Feb	2020-02-11
Memory Element Graph-based Placement In Integrated Circuit Design App 20190188352 - Kim; Myung-Chul ; et al.	2019-06-20
Critical path straightening system based on free-space aware and timing driven incremental placement Grant 10,216,882 - Jung , et al. Feb	2019-02-26
Optimizing placement of circuit resources using a globally accessible placement memory Grant 10,210,297 - Hathaway , et al. Feb	2019-02-19
Large Cluster Persistence During Placement Optimization Of Integrated Circuit Designs App 20190026418 - Kim; Myung-Chul ; et al.	2019-01-24
Hierarchically aware interior pinning for large synthesis blocks Grant 10,157,255 - Affeldt , et al. Dec	2018-12-18
Large cluster persistence during placement optimization of integrated circuit designs Grant 10,140,409 - Kim , et al. Nov	2018-11-27
Critical Path Straightening System Based On Free-space Aware And Timing Driven Incremental Placement App 20180121575 - Jung; Jinwook ; et al.	2018-05-03
Hierarchically Aware Interior Pinning For Large Synthesis Blocks App 20180082008 - Affeldt; Matthew D. ; et al.	2018-03-22
Hierarchically aware interior pinning for large synthesis blocks Grant 9,910,952 - Affeldt , et al. March 6, 2	2018-03-06
Hierarchically Aware Interior Pinning For Large Synthesis Blocks App 20180004885 - Affeldt; Matthew D. ; et al.	2018-01-04
Constraint-driven pin optimization for hierarchical design convergence Grant 9,858,377 - Berry , et al. January 2, 2	2018-01-02
Optimizing placement of circuit resources using a globally accessible placement memory Grant 9,747,400 - Hathaway , et al. August 29, 2	2017-08-29
Large Cluster Persistence During Placement Optimization Of Integrated Circuit Designs App 20170220722 - KIM; MYUNG-CHUL ; et al.	2017-08-03
Hierarchical wire-pin co-optimization Grant 9,715,572 - Berry , et al. July 25, 2	2017-07-25
Optimizing placement of circuit resources using a globally accessible placement memory Grant 9,703,914 - Hathaway , et al. July 11, 2	2017-07-11
Hierarchical wire-pin co-optimization Grant 9,697,322 - Berry , et al. July 4, 2	2017-07-04
Constraint-driven Pin Optimization For Hierarchical Design Convergence App 20170132349 - Berry; Christopher J. ; et al.	2017-05-11
Optimizing Placement Of Circuit Resources Using A Globally Accessible Placement Memory App 20170083642 - Hathaway; David J. ; et al.	2017-03-23
Optimizing Placement Of Circuit Resources Using A Globally Accessible Placement Memory App 20170083641 - Hathaway; David J. ; et al.	2017-03-23
Hierarchical Wire-pin Co-optimization App 20170011163 - Berry; Christopher J. ; et al.	2017-01-12
Hierarchical Wire-pin Co-optimization App 20170011162 - Berry; Christopher J. ; et al.	2017-01-12
Merging of storage elements on multi-cycle signal distribution trees into multi-bit cells Grant 9,519,744 - Migatz , et al. December 13, 2	2016-12-13
Large cluster persistence during placement optimization of integrated circuit designs Grant 9,495,501 - Kim , et al. November 15, 2	2016-11-15
Optimizing Placement Of Circuit Resources Using A Globally Accessible Placement Memory App 20160300006 - Hathaway; David J. ; et al.	2016-10-13
Optimizing Placement Of Circuit Resources Using A Globally Accessible Placement Memory App 20160283633 - Hathaway; David J. ; et al.	2016-09-29
Optimizing placement of circuit resources using a globally accessible placement memory Grant 9,436,791 - Hathaway , et al. September 6, 2	2016-09-06
Optimizing placement of circuit resources using a globally accessible placement memory Grant 9,418,188 - Hathaway , et al. August 16, 2	2016-08-16
Thermally aware pin assignment and device placement Grant 9,053,285 - Darden , et al. June 9, 2	2015-06-09
Thermally Aware Pin Assignment And Device Placement App 20150113496 - Darden; Randall J. ; et al.	2015-04-23
Structured placement of hierarchical soft blocks during physical synthesis of an integrated circuit Grant 8,954,915 - Chan , et al. February 10, 2	2015-02-10
Structured placement of latches/flip-flops to minimize clock power in high-performance designs Grant 8,954,912 - Alpert , et al. February 10, 2	2015-02-10
Scheduling for parallel processing of regionally-constrained placement problem Grant 8,930,867 - Nam , et al. January 6, 2	2015-01-06
Structured Placement Of Hierarchical Soft Blocks During Physical Synthesis Of An Integrated Circuit App 20140359546 - Chan; Yiu-Hing ; et al.	2014-12-04
Post-placement cell shifting Grant 8,782,584 - Alpert , et al. July 15, 2	2014-07-15
Separate refinement of local wirelength and local module density in intermediate placement of an integrated circuit design Grant 8,769,457 - Alpert , et al. July 1, 2	2014-07-01
Structured Placement Of Latches/flip-flops To Minimize Clock Power In High-performance Designs App 20140149957 - Alpert; Charles J. ; et al.	2014-05-29
Electronic design automation object placement with partially region-constrained objects Grant 8,683,411 - Alpert , et al. March 25, 2	2014-03-25
Scheduling for Parallel Processing of Regionally-Constrained Placement Problem App 20140033154 - Nam; Gi-Joon ; et al.	2014-01-30
Separate Refinement Of Local Wirelength And Local Module Density In Intermediate Placement Of An Integrated Circuit Design App 20140007036 - Alpert; Charles J. ; et al.	2014-01-02
Post-placement Cell Shifting App 20130346938 - Alpert; Charles J ; et al.	2013-12-26
Local objective optimization in global placement of an integrated circuit design Grant 8,595,675 - Alpert , et al. November 26, 2	2013-11-26
Scheduling for parallel processing of regionally-constrained placement problem Grant 8,578,315 - Nam , et al. November 5, 2	2013-11-05
Post-placement cell shifting Grant 8,495,534 - Alpert , et al. July 23, 2	2013-07-23
Detailed routability by cell placement Grant 8,347,257 - Alpert , et al. January 1, 2	2013-01-01
Incremental timing optimization and placement Grant 8,347,249 - Alpert , et al. January 1, 2	2013-01-01
Whitespace Creation And Preservation In Circuit Design App 20120297355 - Alpert; Charles Jay ; et al.	2012-11-22
Scheduling for Parallel Processing of Regionally-Constrained Placement Problem App 20120284733 - Nam; Gi-Joon ; et al.	2012-11-08
Automatic positioning of gate array circuits in an integrated circuit design Grant 8,276,105 - Keinert , et al. September 25, 2	2012-09-25
Scheduling for parallel processing of regionally-constrained placement problem Grant 8,245,173 - Nam , et al. August 14, 2	2012-08-14
Constraint programming based method for bus-aware macro-block pin placement in a hierarchical integrated circuit layout Grant 8,234,615 - Ramji , et al. July 31, 2	2012-07-31
Electronic Design Automation Object Placement With Partially Region-constrained Objects App 20120054708 - Alpert; Charles J. ; et al.	2012-03-01
Constraint Programming Based Method for Bus-Aware Macro-Block Pin Placement in a Hierarchical Integrated Circuit Layout App 20120036491 - Ramji; Shyam ; et al.	2012-02-09
Detailed Routability By Cell Placement App 20110302545 - Alpert; Charles J. ; et al.	2011-12-08
Post-placement Cell Shifting App 20110302544 - Alpert; Charles J. ; et al.	2011-12-08
Clock power minimization with regular physical placement of clock repeater components Grant 8,010,926 - Alpert , et al. August 30, 2	2011-08-30
Legalization of VLSI circuit placement with blockages using hierarchical row slicing Grant 7,934,188 - Alpert , et al. April 26, 2	2011-04-26
Automatic Positioning of Gate Array Circuits in an Integrated Circuit Design App 20110072407 - Keinert; Joachim ; et al.	2011-03-24
Incremental Timing Optimization And Placement App 20100257498 - Alpert; Charles J. ; et al.	2010-10-07
Scheduling For Parallel Processing Of Regionally-constrained Placement Problem App 20100192155 - Nam; Gi-Joon ; et al.	2010-07-29
Legalization of VLSI circuit placement with blockages using hierarchical row slicing App 20090271752 - Alpert; Charles J. ; et al.	2009-10-29
Clock Power Minimization With Regular Physical Placement Of Clock Repeater Components App 20090193376 - Alpert; Charles J. ; et al.	2009-07-30
Latch placement for high performance and low power circuits Grant 7,549,137 - Alpert , et al. June 16, 2	2009-06-16
Latch Placement for High Performance and Low Power Circuits App 20080148203 - Alpert; Charles J. ; et al.	2008-06-19
Method for legalizing the placement of cells in an integrated circuit layout Grant 7,089,521 - Kurzum , et al. August 8, 2	2006-08-08
Method for successive placement based refinement of a generalized cost function Grant 7,076,755 - Ren , et al. July 11, 2	2006-07-11
Method For Successive Placement Based Refinement Of A Generalized Cost Function App 20050166164 - Ren, Haoxing ; et al.	2005-07-28
Method for legalizing the placement of cells in an integrated circuit layout App 20050166169 - Kurzum, Zahi M. ; et al.	2005-07-28
Congestion mitigation with logic order preservation App 20030217338 - Holmes, Glenn E. ; et al.	2003-11-20

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