Ramamurthy; Gopalakrishnan

Patent Applications and Registrations

Patent applications and USPTO patent grants for Ramamurthy; Gopalakrishnan.The latest application filed is for "method and system for guaranteeing quality of service in large capacity input output buffered cell switch based on minimum bandwidth guarantees and weighted fair share of unused bandwidth".

Company Profile

0.14.4

Ramamurthy; Gopalakrishnan - West Windsor NJ
Ramamurthy; Gopalakrishnan - Cranbury NJ

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Method and apparatus for ensuring cell ordering in large capacity switching systems and for synchronizing the arrival time of cells to a switch fabric Grant 7,408,959 - Braff , et al. August 5, 2	2008-08-05
Method and system for guaranteeing quality of service in a multi-plane cell switch Grant 7,292,580 - Ramamurthy , et al. November 6, 2	2007-11-06
Weighted fair share scheduler for large input-buffered high-speed cross-point packet/cell switches Grant 7,292,594 - Meempat , et al. November 6, 2	2007-11-06
Method and system for guaranteeing quality of service in large capacity input output buffered cell switch based on minimum bandwidth guarantees and weighted fair share of unused bandwidth App 20030227926 - Ramamurthy, Gopalakrishnan ; et al.	2003-12-11
Weighted fair share scheduler for large input-buffered high-speed cross-point packet/cell switches App 20030227932 - Meempat, Gopalakrishnan ; et al.	2003-12-11
Method and apparatus for ensuring cell ordering in large capacity switching systems and for synchronizing the arrival time of cells to a switch fabric App 20030227945 - Braff, Martin ; et al.	2003-12-11
RRGS-round-robin greedy scheduling for input/output terabit switches Grant 6,618,379 - Ramamurthy , et al. September 9, 2	2003-09-09
Resource and protocol management for virtual private networks within multiprocessor ATM switches App 20020097725 - Dighe, Rajiv ; et al.	2002-07-25
Optimal buffer management scheme with dynamic queue length thresholds for ATM switches Grant 6,424,622 - Fan , et al. July 23, 2	2002-07-23
Dynamic rate control scheduler for ATM networks Grant 6,408,005 - Fan , et al. June 18, 2	2002-06-18
Large capacity, multiclass core ATM switch architecture Grant 6,324,165 - Fan , et al. November 27, 2	2001-11-27
Real-time estimation and dynamic renegotiation of UPC values for arbitrary traffic sources in ATM networks Grant 6,304,551 - Ramamurthy , et al. October 16, 2	2001-10-16
Multi-class connection admission control method for Asynchronous Transfer Mode (ATM) switches Grant 6,046,981 - Ramamurthy , et al. April 4, 2	2000-04-04
Design of a closed loop feed back control for ABR service Grant 5,737,313 - Kolarov , et al. April 7, 1	1998-04-07
VBR MPEG video encoding for ATM networks with dynamic bandwidth renegotiation Grant 5,675,384 - Ramamurthy , et al. October 7, 1	1997-10-07
UPC-based traffic control framework for ATM networks Grant 5,530,695 - Dighe , et al. June 25, 1	1996-06-25
Control architecture for ATM networks Grant 5,448,567 - Dighe , et al. September 5, 1	1995-09-05
Predictive congestion control of high-speed wide area networks Grant 5,276,677 - Ramamurthy , et al. January 4, 1	1994-01-04

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