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name:-0.024070978164673
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Rajwade; Shantanu R. Patent Filings

Rajwade; Shantanu R.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Rajwade; Shantanu R..The latest application filed is for "cache processes with adaptive dynamic start voltage calculation for memory devices".

Company Profile
14.20.22
  • Rajwade; Shantanu R. - Sunnyvale CA
  • RAJWADE; Shantanu R. - Santa Clara CA
  • Rajwade; Shantanu R - Santa Clara CA
  • Rajwade; Shantanu R. - US
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Cache Processes With Adaptive Dynamic Start Voltage Calculation For Memory Devices
App 20220310178 - Yang; Xiang ;   et al.
2022-09-29
Dynamic Detection And Dynamic Adjustment Of Sub-threshold Swing In A Memory Cell Sensing Circuit
App 20220208286 - AMEEN BESHARI; Tarek Ahmed ;   et al.
2022-06-30
Memory Cell Sensing Circuit With Adjusted Bias From Pre-boost Operation
App 20220172784 - RAJWADE; Shantanu R. ;   et al.
2022-06-02
Apparatuses And Methods For Concurrently Accessing Multiple Memory Planes Of A Memory During A Memory Access Operation
App 20220155958 - Rajwade; Shantanu R. ;   et al.
2022-05-19
Apparatuses and methods for concurrently accessing multiple memory planes of a memory during a memory access operation
Grant 11,182,074 - Rajwade , et al. November 23, 2
2021-11-23
Using variable voltages to discharge electrons from a memory array during verify recovery operations
Grant 11,139,036 - Ameen Beshari , et al. October 5, 2
2021-10-05
Using Variable Voltages To Discharge Electrons From A Memory Array During Verify Recovery Operations
App 20210249092 - AMEEN BESHARI; Tarek Ahmed ;   et al.
2021-08-12
Boosted bitlines for storage cell programmed state verification in a memory array
Grant 11,056,203 - Yang , et al. July 6, 2
2021-07-06
SSD having a parallelized, multi-level program voltage verification
Grant 11,004,524 - Yang , et al. May 11, 2
2021-05-11
Ssd Having A Parallelized, Multi-level Program Voltage Verification
App 20210104285 - YANG; Xiang ;   et al.
2021-04-08
Method and apparatus for dynamically determining start program voltages for a memory device
Grant 10,714,186 - Sule , et al.
2020-07-14
Ramping inhibit voltage during memory programming
Grant 10,658,053 - Rajwade , et al.
2020-05-19
Solid State Drive (ssd) With In-flight Erasure Iteration Suspension
App 20200135284 - DAYACAP; Justin R. ;   et al.
2020-04-30
Segmented erase in memory
Grant 10,453,535 - Rajwade , et al. Oc
2019-10-22
Method And Apparatus For Dynamically Determining Start Program Voltages For A Memory Device
App 20190304543 - Sule; Purval Shyam ;   et al.
2019-10-03
Buffer operations in memory
Grant 10,430,114 - Kalavade , et al. O
2019-10-01
Apparatuses And Methods For Concurrently Accessing Multiple Memory Planes Of A Memory During A Memory Access Operation
App 20190258404 - Rajwade; Shantanu R. ;   et al.
2019-08-22
Apparatuses and methods for concurrently accessing multiple memory planes of a memory during a memory access operation
Grant 10,379,738 - Rajwade , et al. A
2019-08-13
Method and apparatus for improving sequential reading in NAND flash
Grant 10,289,313 - Liu , et al.
2019-05-14
Method and apparatus for dynamically determining start program voltages for a memory device
Grant 10,224,107 - Sule , et al.
2019-03-05
Method, System, And Apparatus For Detecting Failure Of Programming Of A Memory Device
App 20190006016 - KHAKIFIROOZ; Ali ;   et al.
2019-01-03
Predictive count fail byte (CFBYTE) for non-volatile memory
Grant 10,141,071 - Rajwade , et al. Nov
2018-11-27
Buffer Operations In Memory
App 20180217782 - Kalavade; Pranav ;   et al.
2018-08-02
Buffer Operations In Memory
App 20180143784 - Kalavade; Pranav ;   et al.
2018-05-24
Buffer operations in memory
Grant 9,977,622 - Kalavade , et al. May 22, 2
2018-05-22
Apparatuses And Methods For Concurrently Accessing Multiple Memory Planes Of A Memory During A Memory Access Operation
App 20180136845 - Rajwade; Shantanu R. ;   et al.
2018-05-17
Ramping Inhibit Voltage During Memory Programming
App 20180122487 - RAJWADE; Shantanu R. ;   et al.
2018-05-03
Apparatuses and methods for concurrently accessing multiple memory planes of a memory during a memory access operation
Grant 9,910,594 - Rajwade , et al. March 6, 2
2018-03-06
Performing read operations on a memory device
Grant 9,865,357 - Thimmegowda , et al. January 9, 2
2018-01-09
Method And Apparatus For Improving Sequential Reading In Nand Flash
App 20170371565 - Liu; Han ;   et al.
2017-12-28
Method And Apparatus For Reducing Data Program Completion Overhead In Nand Flash
App 20170371779 - Rajwade; Shantanu R. ;   et al.
2017-12-28
Method and apparatus for reducing data program completion overhead in NAND flash
Grant 9,852,065 - Rajwade , et al. December 26, 2
2017-12-26
Ramping inhibit voltage during memory programming
Grant 9,792,997 - Rajwade , et al. October 17, 2
2017-10-17
Method and apparatus for protecting lower page data during programming in NAND flash
Grant 9,703,494 - Rajwade , et al. July 11, 2
2017-07-11
Predictive count fail byte (CFBYTE) for non-volatile memory
App 20170186497 - Rajwade; Shantanu R. ;   et al.
2017-06-29
Apparatuses And Methods For Concurrently Accessing Multiple Memory Planes Of A Memory During A Memory Access Operation
App 20170131904 - RAJWADE; SHANTANU R. ;   et al.
2017-05-11
Segmented Erase In Memory
App 20170117049 - Rajwade; Shantanu R. ;   et al.
2017-04-27
Ramping Inhibit Voltage During Memory Programming
App 20160372207 - Rajwade; Shantanu R. ;   et al.
2016-12-22
Ramping inhibit voltage during memory programming
Grant 9,418,752 - Rajwade , et al. August 16, 2
2016-08-16
Ramping Inhibit Voltage During Memory Programming
App 20150279476 - Rajwade; Shantanu R. ;   et al.
2015-10-01

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