Rajguru; Chaitanya S.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Rajguru; Chaitanya S..The latest application filed is for "system, apparatus, and method to enable and disable a mode of operation of a stacked circuit arrangement on an independent circuit basis using register bits and a single shared mode control line".

Company Profile

0.5.5

Rajguru; Chaitanya S. - Bangalore IN
Rajguru; Chaitanya S. - Folsom CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Non-volatile configuration data storage for a configurable memory Grant 7,386,654 - Dover , et al. June 10, 2	2008-06-10
Sensing word groups in a memory Grant 7,191,295 - Qawami , et al. March 13, 2	2007-03-13
System, apparatus, and method to enable and disable a mode of operation of a stacked circuit arrangement on an independent circuit basis using register bits and a single shared mode control line App 20060136755 - Qawami; Shekoufeh ; et al.	2006-06-22
Non-volatile configuration data storage for a configurable memory App 20060083093 - Dover; Lance W. ; et al.	2006-04-20
Flash memory program and erase operations Grant 6,937,948 - Rajguru August 30, 2	2005-08-30
Method and system to retrieve information Grant 6,920,539 - Qawami , et al. July 19, 2	2005-07-19
Sensing word groups in a memory App 20040268075 - Qawami, Shekoufeh ; et al.	2004-12-30
Method and system to retrieve information App 20040003192 - Qawami, Shekoufeh ; et al.	2004-01-01
Flash memory program and erase operations App 20030093233 - Rajguru, Chaitanya S.	2003-05-15
Method and apparatus for programming and erasing flash EEPROM memory arrays utilizing a charge pump circuit Grant 5,414,669 - Tedrow , et al. May 9, 1	1995-05-09

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