loadpatents
Patent applications and USPTO patent grants for Rajendran; Sankerlingam.The latest application filed is for "double-sided, high-density network fabrication".
Patent | Date |
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Double-sided, high-density network fabrication Grant 11,317,505 - Atwood , et al. April 26, 2 | 2022-04-26 |
Double-sided, High-density Network Fabrication App 20210321511 - Atwood; Brian K. ;   et al. | 2021-10-14 |
Double-sided, high-density network fabrication Grant 11,096,271 - Atwood , et al. August 17, 2 | 2021-08-17 |
Shaped magnetic bias circulator Grant 10,727,558 - Rajendran , et al. | 2020-07-28 |
Shaped Magnetic Bias Circulator App 20200153072 - Rajendran; Sankerlingam ;   et al. | 2020-05-14 |
Shaped magnetic bias circulator Grant 10,573,948 - Rajendran , et al. Feb | 2020-02-25 |
Method for Making a Composite Substrate Circulator Component App 20190386371 - Hanna; Mark B. ;   et al. | 2019-12-19 |
Shaped Magnetic Bias Circulator App 20190363416 - Rajendran; Sankerlingam ;   et al. | 2019-11-28 |
Shaped magnetic bias circulator Grant 10,431,865 - Rajendran , et al. O | 2019-10-01 |
Method for making a composite substrate circulator component Grant 10,403,958 - Hanna , et al. Sep | 2019-09-03 |
Method of lamination of dielectric circuit materials using ultrasonic means Grant 10,356,914 - Kocurek , et al. July 16, 2 | 2019-07-16 |
Shaped magnetic bias circulator App 20190027799 - Rajendran; Sankerlingam ;   et al. | 2019-01-24 |
Shaped magnetic bias circulator Grant 10,096,879 - Rajendran , et al. October 9, 2 | 2018-10-09 |
Method for Making a Composite Substrate Circulator Component App 20180175473 - Hanna; Mark B. ;   et al. | 2018-06-21 |
Stacked low loss stripline circulator Grant 9,899,717 - Bedinger , et al. February 20, 2 | 2018-02-20 |
Ultrasonic Lamination Of Dielectric Circuit Materials App 20170290172 - Kocurek; Patrick J. ;   et al. | 2017-10-05 |
Shaped Magnetic Bias Circulator App 20170256836 - Rajendran; Sankerlingam ;   et al. | 2017-09-07 |
Stacked Low Loss Stripline Circulator App 20170104256 - Bedinger; John M. ;   et al. | 2017-04-13 |
Heterogeneous chip integration with low loss interconnection through adaptive patterning Grant 8,963,313 - Rajendran , et al. February 24, 2 | 2015-02-24 |
System for forming patterns on a multi-curved surface Grant 7,979,144 - Rajendran , et al. July 12, 2 | 2011-07-12 |
Method and Apparatus for Building Multilayer Circuits App 20100300734 - Ables; Billy D. ;   et al. | 2010-12-02 |
System for Forming Patterns on a Multi-Curved Surface App 20090110265 - Rajendran; Sankerlingam ;   et al. | 2009-04-30 |
Method for sealing vias in a substrate App 20080099537 - Chahal; Premjeet ;   et al. | 2008-05-01 |
Solid hermetic via and bump fabrication Grant 6,583,058 - Rajendran , et al. June 24, 2 | 2003-06-24 |
Wet-tip die for EFG cyrstal growth apparatus Grant 5,102,494 - Harvey , et al. April 7, 1 | 1992-04-07 |
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