loadpatents
name:-0.0090930461883545
name:-0.014888048171997
name:-0.0026659965515137
Rajasekhar; Sanjay Patent Filings

Rajasekhar; Sanjay

Patent Applications and Registrations

Patent applications and USPTO patent grants for Rajasekhar; Sanjay.The latest application filed is for "correlated double sampling analog-to-digital converter".

Company Profile
2.16.10
  • Rajasekhar; Sanjay - Newbury GB
  • Rajasekhar; Sanjay - Bangalore IN
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Correlated double sampling analog-to-digital converter
Grant 11,190,197 - Rajasekhar , et al. November 30, 2
2021-11-30
Pre-charging circuitry for multiplexer
Grant 10,931,122 - Hurrell , et al. February 23, 2
2021-02-23
Correlated Double Sampling Analog-to-digital Converter
App 20200382127 - Rajasekhar; Sanjay ;   et al.
2020-12-03
Low noise analog-to-digital converter
Grant 10,715,160 - Rajasekhar , et al.
2020-07-14
Low power duty-cycled reference
Grant 10,409,312 - Rajasekhar Sept
2019-09-10
Correlated double sampling analog-to-digital converter
Grant 10,128,859 - Rajasekhar , et al. November 13, 2
2018-11-13
Pre-Charging Circuitry for Multiplexer
App 20180167067 - Hurrell; Christopher Peter ;   et al.
2018-06-14
Precision low noise continuous time sigma delta converter
Grant 9,800,262 - Maurino , et al. October 24, 2
2017-10-24
Low noise precision input stage for analog-to-digital converters
Grant 9,391,628 - Lyden , et al. July 12, 2
2016-07-12
Apparatus and methods for autozero amplifiers
Grant 9,294,037 - Maurino , et al. March 22, 2
2016-03-22
Apparatus And Methods For Autozero Amplifiers
App 20150270805 - Maurino; Roberto S. ;   et al.
2015-09-24
Method and apparatus for reducing capacitor induced ISI in DACS
Grant 9,065,463 - Rajasekhar June 23, 2
2015-06-23
Linear and DC-accurate frontend DAC and input structure
Grant 9,065,477 - Rajasekhar , et al. June 23, 2
2015-06-23
Method And Apparatus For Reducing Capacitor Induced Isi In Dacs
App 20150102949 - Rajasekhar; Sanjay
2015-04-16
Linear And Dc-accurate Frontend Dac And Input Structure
App 20150061908 - RAJASEKHAR; Sanjay ;   et al.
2015-03-05
Continuous Time Input Stage
App 20140203957 - MAURINO; Roberto S. ;   et al.
2014-07-24
Continuous time input stage
Grant 8,779,958 - Maurino , et al. July 15, 2
2014-07-15
ADC preamplifier and the multistage auto-zero technique
Grant 8,576,002 - Rajasekhar November 5, 2
2013-11-05
ADC Preamplifier and the Multistage Auto-Zero Technique
App 20120242404 - RAJASEKHAR; Sanjay
2012-09-27

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.

© 2024 USPTO.report | Privacy Policy | Resources | RSS Feed of Trademarks | Trademark Filings Twitter Feed