Rajan; Krishna B.
Patent Applications and Registrations
Patent applications and USPTO patent grants for Rajan; Krishna B..The latest application filed is for "method of testing memory array at operational speed using scan".
- Rajan; Krishna B. - Fremont CA
- Rajan, Krishna B. - Newark CA
- Rajan; Krishna B. - Chicago IL
| Patent | Date |
|---|---|
| Built-in self-test of 3-dimensional semiconductor memory arrays Grant 7,797,594 - Parulkar , et al. September 14, 2 | 2010-09-14 |
| Method of testing memory array at operational speed using scan Grant 7,779,316 - Parulkar , et al. August 17, 2 | 2010-08-17 |
| Method Of Testing Memory Array At Operational Speed Using Scan App 20090150729 - Parulkar; Ishwardutt ; et al. | 2009-06-11 |
| Method and apparatus for delay fault testing App 20030188243 - Rajan, Krishna B. | 2003-10-02 |
| Single scan chain in hierarchiacally bisted designs App 20030149926 - Rajan, Krishna B. | 2003-08-07 |
| Increasing testability by clock transformation Grant 5,625,630 - Abramovici , et al. April 29, 1 | 1997-04-29 |
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