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Patent applications and USPTO patent grants for Raghavan; Prasanna.The latest application filed is for "die back side structures for warpage control".
Patent | Date |
---|---|
Die back side structures for warpage control Grant 11,322,456 - Eid , et al. May 3, 2 | 2022-05-03 |
Coreless package architecture for multi-chip opto-electronics Grant 10,845,552 - Liff , et al. November 24, 2 | 2020-11-24 |
Die Back Side Structures For Warpage Control App 20200066655 - EID; Feras ;   et al. | 2020-02-27 |
Coreless Package Architecture For Multi-chip Opto-electronics App 20190317285 - LIFF; Shawna M. ;   et al. | 2019-10-17 |
Methods of forming trenches in packages structures and structures formed thereby Grant 10,231,338 - Yagnamurthy , et al. | 2019-03-12 |
Electronic assembly that includes stacked electronic devices Grant 9,633,937 - Fei , et al. April 25, 2 | 2017-04-25 |
Methods Of Forming Trenches In Packages Structures And Structures Formed Thereby App 20160381800 - Yagnamurthy; Naga Sivakumar ;   et al. | 2016-12-29 |
Electronic Assembly That Includes Stacked Electronic Devices App 20160225707 - FEI; Huiyang ;   et al. | 2016-08-04 |
Low stress stacked die packages App 20070152314 - Manepalli; Rahul ;   et al. | 2007-07-05 |
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