loadpatents
name:-0.011438131332397
name:-0.0088248252868652
name:-0.0018618106842041
RADOVANOVIC; Nikola Patent Filings

RADOVANOVIC; Nikola

Patent Applications and Registrations

Patent applications and USPTO patent grants for RADOVANOVIC; Nikola.The latest application filed is for "technologies for device attestation".

Company Profile
0.10.10
  • RADOVANOVIC; Nikola - Los Altos CA
  • Radovanovic; Nikola - San Jose CA
  • Radovanovic; Nikola - Santa Clara CA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Technologies For Device Attestation
App 20220292203 - SEVERNS-WILLIAMS; Christine E. ;   et al.
2022-09-15
Partitioned Platform Security Mechanism
App 20210319088 - Pillilli; Bharat ;   et al.
2021-10-14
Depth Image Generation Utilizing Depth Information Reconstructed From An Amplitude Image
App 20160247286 - Mazurenko; Ivan L. ;   et al.
2016-08-25
System for execution of security related functions
Grant 9,208,330 - Srinivasan , et al. December 8, 2
2015-12-08
System For Execution Of Security Related Functions
App 20150220744 - Srinivasan; Krishnan ;   et al.
2015-08-06
Security protocol processing for anti-replay protection
Grant 8,438,641 - Vukovic , et al. May 7, 2
2013-05-07
Security association prefetch for security protcol processing
Grant 8,359,466 - Liu , et al. January 22, 2
2013-01-22
Securtiy Association Prefetch For Security Protcol Processing
App 20120278615 - Liu; Sheng ;   et al.
2012-11-01
Security Protocol Processing For Anti-replay Protection
App 20120174216 - Vukovic; Vojislav ;   et al.
2012-07-05
Optimizing IC clock structures by minimizing clock uncertainty
Grant 7,356,785 - Lu , et al. April 8, 2
2008-04-08
Method of buffer insertion to achieve pin specific delays
Grant 7,243,324 - Lu , et al. July 10, 2
2007-07-10
Optimizing IC clock structures by minimizing clock uncertainty
App 20060190886 - Lu; Aiguo ;   et al.
2006-08-24
Method of buffer insertion to achieve pin specific delays
App 20060190901 - Lu; Aiguo ;   et al.
2006-08-24
Optimizing IC clock structures by minimizing clock uncertainty
Grant 7,096,442 - Lu , et al. August 22, 2
2006-08-22
Built-in functional tester for search engines
Grant 7,082,561 - Andreev , et al. July 25, 2
2006-07-25
Optimizing IC clock structures by minimizing clock uncertainty
App 20050010884 - Lu, Aiguo ;   et al.
2005-01-13
Direct transformation of engineering change orders to synthesized IC chip designs
Grant 6,651,239 - Nikitin , et al. November 18, 2
2003-11-18
Built-in functional tester for search engines
App 20030204799 - Andreev, Alexander E. ;   et al.
2003-10-30

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.

© 2024 USPTO.report | Privacy Policy | Resources | RSS Feed of Trademarks | Trademark Filings Twitter Feed