Radigan; Steven J.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Radigan; Steven J..The latest application filed is for "3d memory having vertical switches with surround gates and method thereof".

Company Profile

1.38.37

Radigan; Steven J. - Fremont CA
Radigan; Steven J - Fremont CA
Radigan; Steven J. - San Jose CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Concave word line and convex interlayer dielectric for protecting a read/write layer Grant 9,666,799 - Yanagida , et al. May 30, 2	2017-05-30
3D Memory Having Vertical Switches with Surround Gates and Method Thereof App 20170040381 - Chen; Yung-Tin ; et al.	2017-02-09
Concave Word Line And Convex Interlayer Dielectric For Protecting A Read/write Layer App 20160126292 - Yanagida; Naohito ; et al.	2016-05-05
Method for using nanoparticles to make uniform discrete floating gate layer Grant 8,987,802 - Lee , et al. March 24, 2	2015-03-24
Method For Using Nanoparticles To Make Uniform Discrete Floating Gate Layer App 20140239365 - Lee; Donovan ; et al.	2014-08-28
Methods for protecting patterned features during trench etch Grant 8,722,518 - Radigan , et al. May 13, 2	2014-05-13
Methods for increased array feature density Grant 8,658,526 - Xu , et al. February 25, 2	2014-02-25
Resist feature and removable spacer pitch doubling patterning method for pillar structures Grant 8,637,389 - Chen , et al. January 28, 2	2014-01-28
3d Memory Having Vertical Switches With Surround Gates And Method Thereof App 20130336037 - Chen; Yung-Tin ; et al.	2013-12-19
Methods For Protecting Patterned Features During Trench Etch App 20130244395 - Radigan; Steven J. ; et al.	2013-09-19
Methods For Increased Array Feature Density App 20130183829 - Xu; Huiwen ; et al.	2013-07-18
Resist Feature And Removable Spacer Pitch Doubling Patterning Method For Pillar Structures App 20130130467 - Chen; Yung-Tin ; et al.	2013-05-23
Methods for increased array feature density Grant 8,372,740 - Xu , et al. February 12, 2	2013-02-12
Resist feature and removable spacer pitch doubling patterning method for pillar structures Grant 8,357,606 - Chen , et al. January 22, 2	2013-01-22
Patterning method for high density pillar structures Grant 8,329,512 - Nguyen , et al. December 11, 2	2012-12-11
Patterning Method for High Density Pillar Structures App 20120276744 - Nguyen; Natalie ; et al.	2012-11-01
Method for forming a nonvolatile memory cell comprising a reduced height vertical diode Grant 8,252,644 - Herner , et al. August 28, 2	2012-08-28
Patterning method for high density pillar structures Grant 8,241,969 - Nguyen , et al. August 14, 2	2012-08-14
Methods For Increased Array Feature Density App 20120135603 - Xu; Huiwen ; et al.	2012-05-31
Three dimensional horizontal diode non-volatile memory array and method of making thereof Grant 8,187,932 - Nguyen , et al. May 29, 2	2012-05-29
Resist Feature And Removable Spacer Pitch Doubling Patterning Method For Pillar Structures App 20120094478 - Chen; Yung-Tin ; et al.	2012-04-19
Three Dimensional Horizontal Diode Non-Volatile Memory Array and Method of Making Thereof App 20120091413 - Nguyen; Natalie ; et al.	2012-04-19
Methods for increased array feature density Grant 8,114,765 - Xu , et al. February 14, 2	2012-02-14
Nonvolatile Memory Cell Comprising A Reduced Height Vertical Diode App 20110318911 - Herner; S. Brad ; et al.	2011-12-29
Resist feature and removable spacer pitch doubling patterning method for pillar structures Grant 8,084,347 - Chen , et al. December 27, 2	2011-12-27
Method of making pillars using photoresist spacer mask Grant 8,080,443 - Chen , et al. December 20, 2	2011-12-20
Patterning Method for High Density Pillar Structures App 20110306174 - Nguyen; Natalie ; et al.	2011-12-15
Liner for tungsten/silicon dioxide interface in memory Grant 8,071,475 - Tanaka , et al. December 6, 2	2011-12-06
Patterning method for high density pillar structures Grant 8,026,178 - Nguyen , et al. September 27, 2	2011-09-27
Nonvolatile memory cell comprising a reduced height vertical diode Grant 8,018,025 - Herner , et al. September 13, 2	2011-09-13
Method for fabricating a 3-D integrated circuit using a hard mask of silicon-oxynitride on amorphous carbon Grant 7,994,068 - Radigan , et al. August 9, 2	2011-08-09
Masking of repeated overlay and alignment marks to allow reuse of photomasks in a vertical structure Grant 7,982,273 - Chen , et al. July 19, 2	2011-07-19
Patterning Method For High Density Pillar Structures App 20110171815 - NGUYEN; Natalie ; et al.	2011-07-14
Imaging post structures using X and Y dipole optics and a single mask Grant 7,968,277 - Chen , et al. June 28, 2	2011-06-28
Method of making damascene diodes using sacrificial material Grant 7,927,977 - Makala , et al. April 19, 2	2011-04-19
Patterning method for high density pillar structures Grant 7,923,305 - Nguyen , et al. April 12, 2	2011-04-12
Method of making damascene diodes using sacrificial material App 20110014779 - Makala; Raghuveer S. ; et al.	2011-01-20
Imaging Post Structures Using X And Y Dipole Optics And A Single Mask App 20100243602 - Chen; Yung-Tin ; et al.	2010-09-30
Imaging post structures using x and y dipole optics and a single mask Grant 7,794,921 - Chen , et al. September 14, 2	2010-09-14
Method for fabricating self-aligned complementary pillar structures and wiring Grant 7,786,015 - Chen , et al. August 31, 2	2010-08-31
Methods For Increased Array Feature Density App 20100193916 - Xu; Huiwen ; et al.	2010-08-05
Nonvolatile Memory Cell Comprising A Reduced Height Vertical Diode App 20100181657 - Herner; S. Brad ; et al.	2010-07-22
Method For Fabricating A 3-d Integrated Circuit Using A Hard Mask Of Silicon-oxynitride On Amorphous Carbon App 20100184259 - Radigan; Steven J. ; et al.	2010-07-22
Method for fabricating pitch-doubling pillar structures Grant 7,759,201 - Petti , et al. July 20, 2	2010-07-20
Ultrashallow semiconductor contact by outdiffusion from a solid source Grant 7,754,605 - Herner , et al. July 13, 2	2010-07-13
Resist feature and removable spacer pitch doubling patterning method for pillar structures App 20100167520 - Chen; Yung-Tin ; et al.	2010-07-01
Method for fabricating a 3-D integrated circuit using a hard mask of silicon-oxynitride on amorphous carbon Grant 7,718,546 - Radigan , et al. May 18, 2	2010-05-18
Method of making pillars using photoresist spacer mask App 20100105210 - Chen; Yung-Tin ; et al.	2010-04-29
Method for reducing pillar structure dimensions of a semiconductor device Grant 7,682,942 - Chen , et al. March 23, 2	2010-03-23
Conductive Hard Mask To Protect Patterned Features During Trench Etch App 20090273022 - Radigan; Steven J. ; et al.	2009-11-05
Method for fabricating self-aligned complimentary pillar structures and wiring App 20090269932 - Chen; Yung-Tin ; et al.	2009-10-29
Masking Of Repeated Overlay And Alignment Marks To Allow Reuse Of Photomasks In A Vertical Structure App 20090230571 - Chen; Yung-Tin ; et al.	2009-09-17
Conductive hard mask to protect patterned features during trench etch Grant 7,575,984 - Radigan , et al. August 18, 2	2009-08-18
Nonvolatile memory cell comprising a reduced height vertical diode Grant 7,560,339 - Herner , et al. July 14, 2	2009-07-14
Masking of repeated overlay and alignment marks to allow reuse of photomasks in a vertical structure Grant 7,553,611 - Chen , et al. June 30, 2	2009-06-30
Method for fabricating pitch-doubling pillar structures App 20090155962 - Petti; Christopher J. ; et al.	2009-06-18
Liner For Tungsten/silicon Dioxide Interface In Memory App 20090085087 - Tanaka; Yoichiro ; et al.	2009-04-02
Method For Reducing Pillar Structure Dimensions Of A Semiconductor Device App 20090087963 - Chen; Yung-Tin ; et al.	2009-04-02
Method For Fabricating A 3-d Integrated Circuit Using A Hard Mask Of Silicon-oxynitride On Amorphous Carbon App 20090004786 - Radigan; Steven J. ; et al.	2009-01-01
Imaging Post Structures Using X And Y Dipole Optics And A Single Mask App 20080160423 - Chen; Yung-Tin ; et al.	2008-07-03
Nonvolatile Memory Cell Comprising A Reduced Height Vertical Diode App 20080026510 - HERNER; S. BRAD ; et al.	2008-01-31
Ultrashallow semiconductor contact by outdiffusion from a solid source App 20080003793 - Herner; S. Brad ; et al.	2008-01-03
Conductive hard mask to protect patterned features during trench etch App 20070284656 - Radigan; Steven J. ; et al.	2007-12-13
Method for cleaning slurry particles from a surface polished by chemical mechanical polishing Grant 7,300,876 - Dunton , et al. November 27, 2	2007-11-27
Nonvolatile memory cell comprising a reduced height vertical diode Grant 7,285,464 - Herner , et al. October 23, 2	2007-10-23
Masking of repeated overlay and alignment marks to allow reuse of photomasks in a vertical structure App 20060222962 - Chen; Yung-Tin ; et al.	2006-10-05
Method for cleaning slurry particles from a surface polished by chemical mechanical polishing App 20060128153 - Dunton; Samuel V. ; et al.	2006-06-15
Metal structures for integrated circuits and methods for making the same Grant 7,018,878 - Vyvoda , et al. March 28, 2	2006-03-28
Nonvolatile memory cell comprising a reduced height vertical diode App 20050098800 - Herner, S. Brad ; et al.	2005-05-12
Structure, fabrication, and corrective test of electron-emitting device having electrode configured to reduce cross-over capacitance and/or facilitate short-circuit repair Grant 6,734,620 - Radigan , et al. May 11, 2	2004-05-11
Structure, fabrication, and corrective test of electron-emitting device having electrode configured to reduce cross-over capacitance and/or facilitate short-circuit repair App 20030107311 - Radigan, Steven J. ; et al.	2003-06-12
Metal structures for integrated circuits and methods for making the same App 20030087484 - Vyvoda, Michael A. ; et al.	2003-05-08
Process for patterning metal connections on a semiconductor structure by using an aluminum oxide etch resistant layer Grant 4,289,574 - Radigan , et al. September 15, 1	1981-09-15

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