Quon; Roger A.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Quon; Roger A..The latest application filed is for "self aligned pattern formation post spacer etchback in tight pitch configurations".

Company Profile

19.56.53

Quon; Roger A. - Rhinebeck NY
Quon; Roger A. - Albany NY
Quon; Roger A. - Austin TX US
Quon; Roger A. - Hopewell Junction NY
Quon; Roger A. - Beacon NY

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Interconnect structure Grant 11,133,216 - Chen , et al. September 28, 2	2021-09-28
Self Aligned Pattern Formation Post Spacer Etchback In Tight Pitch Configurations App 20210280422 - Burns; Sean D. ; et al.	2021-09-09
Self aligned pattern formation post spacer etchback in tight pitch configurations Grant 11,018,007 - Burns , et al. May 25, 2	2021-05-25
Self-aligned quadruple patterning (SAQP) for routing layouts including multi-track jogs Grant 10,957,583 - Burns , et al. March 23, 2	2021-03-23
Metallic synapses for neuromorphic and evolvable hardware Grant 10,840,174 - Fetterolf , et al. November 17, 2	2020-11-17
Back End Of Line Integration For Interconnects App 20200219759 - Peethala; Cornelius B. ; et al.	2020-07-09
Back end of line integration for interconnects Grant 10,699,945 - Peethala , et al.	2020-06-30
Metal insulator metal capacitor devices Grant 10,629,428 - Siddiqui , et al.	2020-04-21
Back End Of Line Integration For Interconnects App 20200111699 - Peethala; Cornelius B. ; et al.	2020-04-09
Surface nitridation in metal interconnects Grant 10,615,116 - Clevenger , et al.	2020-04-07
Self Aligned Pattern Formation Post Spacer Etchback In Tight Pitch Configurations App 20200075336 - Burns; Sean D. ; et al.	2020-03-05
Self-aligned quadruple patterning (SAQP) for routing layouts including multi-track jogs Grant 10,546,774 - Burns , et al. Ja	2020-01-28
Self aligned pattern formation post spacer etchback in tight pitch configurations Grant 10,529,569 - Burns , et al. J	2020-01-07
Modulating the microstructure of metallic interconnect structures Grant 10,529,621 - Quon , et al. J	2020-01-07
Self-aligned Quadruple Patterning (saqp) For Routing Layouts Including Multi-track Jogs App 20190393082 - Burns; Sean D. ; et al.	2019-12-26
Interconnect Structure App 20190371656 - Chen; Hsueh-Chung ; et al.	2019-12-05
Metal Insulator Metal Capacitor Devices App 20190279860 - SIDDIQUI; Shariq ; et al.	2019-09-12
Self aligned conductive lines with relaxed overlay Grant 10,395,985 - Burns , et al. A	2019-08-27
Selective surface modification of interconnect structures Grant 10,373,909 - Patlolla , et al.	2019-08-06
Surface nitridation in metal interconnects Grant 10,361,153 - Clevenger , et al.	2019-07-23
Modulating The Microstructure Of Metallic Interconnect Structures App 20190172747 - Quon; Roger A. ; et al.	2019-06-06
Nitridization for semiconductor structures Grant 10,256,185 - Clevenger , et al.	2019-04-09
Modulating the microstructure of metallic interconnect structures Grant 10,249,532 - Quon , et al.	2019-04-02
Self Aligned Pattern Formation Post Spacer Etchback In Tight Pitch Configurations App 20180350599 - Burns; Sean D. ; et al.	2018-12-06
Interconnect structure Grant 10,128,147 - Clevenger , et al. November 13, 2	2018-11-13
Self aligned pattern formation post spacer etchback in tight pitch configurations Grant 10,121,661 - Burns , et al. November 6, 2	2018-11-06
Surface Nitridation In Metal Interconnects App 20180315703 - Clevenger; Lawrence A. ; et al.	2018-11-01
Metallic Synapses For Neuromorphic And Evolvable Hardware App 20180300599 - FETTEROLF; SHAWN P. ; et al.	2018-10-18
Self aligned conductive lines with relaxed overlay Grant 10,083,864 - Burns , et al. September 25, 2	2018-09-25
Surface nitridation in metal interconnects Grant 10,068,846 - Clevenger , et al. September 4, 2	2018-09-04
Modulating The Microstructure Of Metallic Interconnect Structures App 20180247866 - Quon; Roger A. ; et al.	2018-08-30
Self-aligned Quadruple Patterning (saqp) For Routing Layouts Including Multi-track Jogs App 20180233403 - Burns; Sean D. ; et al.	2018-08-16
Self Aligned Conductive Lines With Relaxed Overlay App 20180233408 - Burns; Sean D. ; et al.	2018-08-16
Self Aligned Pattern Formation Post Spacer Etchback In Tight Pitch Configurations App 20180197738 - Burns; Sean D. ; et al.	2018-07-12
Self-aligned quadruple patterning (SAQP) for routing layouts including multi-track jogs Grant 9,991,156 - Burns , et al. June 5, 2	2018-06-05
Interconnect Structure App 20180151420 - Clevenger; Lawrence A. ; et al.	2018-05-31
Aligning conductive vias with trenches Grant 9,972,533 - Burns , et al. May 15, 2	2018-05-15
Interconnect structure Grant 9,953,864 - Clevenger , et al. April 24, 2	2018-04-24
Surface Area-dependent Semiconductor Device With Increased Surface Area App 20180102315 - AUGUR; Roderick Alan ; et al.	2018-04-12
Self aligned pattern formation post spacer etchback in tight pitch configurations Grant 9,934,970 - Burns , et al. April 3, 2	2018-04-03
Nitridization For Semiconductor Structures App 20180090436 - Clevenger; Lawrence A. ; et al.	2018-03-29
Surface Nitridation In Metal Interconnects App 20180082945 - Clevenger; Lawrence A. ; et al.	2018-03-22
Selective Surface Modification Of Interconnect Structures App 20180082955 - Patlolla; Raghuveer R. ; et al.	2018-03-22
Surface Nitridation In Metal Interconnects App 20180082946 - Clevenger; Lawrence A. ; et al.	2018-03-22
Self aligned conductive lines Grant 9,911,647 - Burns , et al. March 6, 2	2018-03-06
Interconnect Structure App 20180061702 - Clevenger; Lawrence A. ; et al.	2018-03-01
Nitridization for semiconductor structures Grant 9,899,317 - Clevenger , et al. February 20, 2	2018-02-20
Aligning Conductive Vias With Trenches App 20180025943 - Burns; Sean D. ; et al.	2018-01-25
Self Aligned Conductive Lines With Relaxed Overlay App 20180005885 - Burns; Sean D. ; et al.	2018-01-04
Selective surface modification of interconnect structures Grant 9,859,218 - Patlolla , et al. January 2, 2	2018-01-02
Self aligned conductive lines Grant 9,852,946 - Burns , et al. December 26, 2	2017-12-26
Self Aligned Conductive Lines App 20170358492 - Burns; Sean D. ; et al.	2017-12-14
Self Aligned Conductive Lines App 20170358487 - Burns; Sean D. ; et al.	2017-12-14
Self-aligned Quadruple Patterning (saqp) For Routing Layouts Including Multi-track Jogs App 20170352585 - Burns; Sean D. ; et al.	2017-12-07
Surface nitridation in metal interconnects Grant 9,786,603 - Clevenger , et al. October 10, 2	2017-10-10
Self aligned conductive lines Grant 9,786,554 - Burns , et al. October 10, 2	2017-10-10
Method and structure for cut material selection Grant 9,779,944 - Burns , et al. October 3, 2	2017-10-03
Aligning conductive vias with trenches Grant 9,773,700 - Burns , et al. September 26, 2	2017-09-26
Stacked planar capacitors with scaled EOT Grant 9,761,655 - Ando , et al. September 12, 2	2017-09-12
Self aligned conductive lines with relaxed overlay Grant 9,607,886 - Burns , et al. March 28, 2	2017-03-28
Subsurface wires of integrated chip and methods of forming Grant 9,601,513 - Hook , et al. March 21, 2	2017-03-21
Integrated circuit structure with metal crack stop and methods of forming same Grant 9,589,911 - Liang , et al. March 7, 2	2017-03-07
Integrated circuit structure with crack stop and method of forming same Grant 9,589,912 - Liang , et al. March 7, 2	2017-03-07
Integrated Circuit Structure With Crack Stop And Method Of Forming Same App 20170062355 - Liang; Jim S. ; et al.	2017-03-02
Integrated Circuit Structure With Metal Crack Stop And Methods Of Forming Same App 20170062354 - Liang; Jim S. ; et al.	2017-03-02
Self-aligned nano-scale device with parallel plate electrodes Grant 8,802,990 - Clevenger , et al. August 12, 2	2014-08-12
Electrically contactable grids manufacture Grant 8,574,950 - Clevenger , et al. November 5, 2	2013-11-05
Self-aligned nano-scale device with parallel plate electrodes Grant 8,476,530 - Clevenger , et al. July 2, 2	2013-07-02
Structure and method to improve current-carrying capabilities of C4 joints Grant 8,367,543 - Farooq , et al. February 5, 2	2013-02-05
Solar Cell Device App 20120199182 - Drummond; John E. ; et al.	2012-08-09
Self-aligned Nano-scale Device With Parallel Plate Electrodes App 20120189767 - Clevenger; Lawrence A. ; et al.	2012-07-26
Interconnect structures comprising capping layers with low dielectric constants and methods of making the same Grant 8,026,166 - Bonilla , et al. September 27, 2	2011-09-27
Electrically contactable grids manufacture App 20110100453 - Clevenger; Lawrence A. ; et al.	2011-05-05
Variable fill and cheese for mitigation of BEOL topography Grant 7,926,006 - Bailey , et al. April 12, 2	2011-04-12
BLM structure for application to copper pad Grant 7,923,836 - Farooq , et al. April 12, 2	2011-04-12
Self-aligned Nano-scale Device With Parallel Plate Electrodes App 20100319962 - Clevenger; Lawrence A. ; et al.	2010-12-23
Interconnect Structures Comprising Capping Layers With Low Dielectric Constants And Methods Of Making The Same App 20100038793 - Bonilla; Griselda ; et al.	2010-02-18
Structure and method for hybrid tungsten copper metal contact Grant 7,629,264 - Bonilla , et al. December 8, 2	2009-12-08
Structure And Method For Hybrid Tungsten Copper Metal Contact App 20090256263 - Bonilla; Griselda ; et al.	2009-10-15
Method of forming a bond pad on an I/C chip and resulting structure Grant 7,572,726 - Biggs , et al. August 11, 2	2009-08-11
Forming Robust Solder Interconnect Structures By Reducing Effects Of Seed Layer Underetching App 20090163019 - Srivastava; Kamalesh K. ; et al.	2009-06-25
Method for forming robust solder interconnect structures by reducing effects of seed layer underetching Grant 7,473,997 - Srivastava , et al. January 6, 2	2009-01-06
Low stress conductive polymer bump Grant 7,442,878 - Bernier , et al. October 28, 2	2008-10-28
Variable Fill And Cheese For Mitigation Of Beol Topography App 20080203589 - Bailey; Todd C. ; et al.	2008-08-28
Blm Structure For Application To Copper Pad App 20080017984 - Farooq; Mukta G. ; et al.	2008-01-24
Structure And Method To Improve Current-carrying Capabilities Of C4 Joints App 20070222073 - Farooq; Mukta Ghate ; et al.	2007-09-27
Low Stress Conductive Polymer Bump App 20070084629 - Bernier; William E. ; et al.	2007-04-19
Semiconductors And Methods Of Making App 20070080455 - Zupanski-Nielsen; Donna S. ; et al.	2007-04-12
Low stress conductive polymer bump Grant 7,170,187 - Bernier , et al. January 30, 2	2007-01-30
Method for selective electroplating of semiconductor device I/O pads using a titanium-tungsten seed layer Grant 7,144,490 - Cheng , et al. December 5, 2	2006-12-05
Device with area array pads for test probing App 20060249854 - Cheng; Tien-Jen ; et al.	2006-11-09
Methods And Systems For Improving Microelectronic I/o Current Capabilities App 20060211167 - Knickerbocker; John U. ; et al.	2006-09-21
Method of forming a bond pad on an I/C chip and resulting structure App 20060081981 - Biggs; Julie C. ; et al.	2006-04-20
Low Stress Conductive Polymer Bump App 20060043608 - Bernier; William E. ; et al.	2006-03-02
I/C chip suitable for wire bonding Grant 6,995,475 - Biggs , et al. February 7, 2	2006-02-07
Method for forming robust solder interconnect structures by reducing effects of seed layer underetching Grant 6,995,084 - Srivastava , et al. February 7, 2	2006-02-07
Barrier for interconnect and method Grant 6,992,389 - Andricacos , et al. January 31, 2	2006-01-31
Method For Forming Robust Solder Interconnect Structures By Reducing Effects Of Seed Layer Underetching App 20060009022 - Srivastava; Kamalesh K. ; et al.	2006-01-12
Barrier For Interconnect And Method App 20050245070 - Andricacos, Panayotis C. ; et al.	2005-11-03
Method For Forming Robust Solder Interconnect Structures By Reducing Effects Of Seed Layer Underetching App 20050208748 - Srivastava, Kamalesh K. ; et al.	2005-09-22
Device With Area Array Pads For Test Probing App 20050167837 - Cheng, Tien-Jen ; et al.	2005-08-04
Method For Selective Electroplating Of Semiconductor Device I/o Pads Using A Titanium-tungsten Seed Layer App 20050103636 - Cheng, Tien-Jen ; et al.	2005-05-19
Stabilizing Copper Overlayer For Enhanced C4 Interconnect Reliability App 20050104208 - Bartelo, James C. ; et al.	2005-05-19
Method of forming a bond pad on an I/C chip and resulting structure App 20050062170 - Biggs, Julie C. ; et al.	2005-03-24
Encapsulated Pin Structure For Improved Reliability Of Wafer App 20050026416 - Cheng, Tien-Jen ; et al.	2005-02-03