loadpatents
name:-0.085885047912598
name:-0.074743986129761
name:-0.0042619705200195
Qi; Jieming Patent Filings

Qi; Jieming

Patent Applications and Registrations

Patent applications and USPTO patent grants for Qi; Jieming.The latest application filed is for "single-lock delay locked loop with cycle counter and method therefor".

Company Profile
3.74.77
  • Qi; Jieming - Austin TX
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Single-lock delay locked loop with cycle counter and method therefor
Grant 10,608,648 - Qi , et al.
2020-03-31
Single-lock Delay Locked Loop With Cycle Counter And Method Therefor
App 20190181870 - QI; Jieming ;   et al.
2019-06-13
Single-lock delay locked loop with cycle counter and method therefor
Grant 10,250,265 - Qi , et al.
2019-04-02
Single-lock Delay Locked Loop With Cycle Counter And Method Therefor
App 20180351560 - Qi; Jieming ;   et al.
2018-12-06
Single-lock delay locked loop with cycle counter and method therefore
Grant 10,056,909 - Qi , et al. August 21, 2
2018-08-21
Dynamically calibrating the offset of a receiver with a decision feedback equalizer (DFE) while performing data transport operations
Grant 9,444,657 - Chen , et al. September 13, 2
2016-09-13
Dynamically Calibrating The Offset Of A Receiver With A Decision Feedback Equalizer (dfe) While Performing Data Transport Operations
App 20150019770 - Chen; Minhan ;   et al.
2015-01-15
Self-biased high speed level shifter circuit
Grant 8,736,304 - Boerstler , et al. May 27, 2
2014-05-27
Controlling bandwidth reservations method and apparatus
Grant 8,611,368 - Asano , et al. December 17, 2
2013-12-17
Controlling bandwidth reservations method and apparatus
Grant 8,483,227 - Asano , et al. July 9, 2
2013-07-09
Structure for a duty cycle correction circuit
Grant 8,381,143 - Boerstler , et al. February 19, 2
2013-02-19
Structure for managing voltage swings across field effect transistors
Grant 8,201,112 - Boerstler , et al. June 12, 2
2012-06-12
Variable gain amplifier with reduced power consumption
Grant 8,183,920 - Qi , et al. May 22, 2
2012-05-22
Structure for a circuit obtaining desired phase locked loop duty cycle without pre-scaler
Grant 8,108,813 - Boerstler , et al. January 31, 2
2012-01-31
Variable Gain Amplifier With Reduced Power Consumption
App 20120001691 - Qi; Jieming ;   et al.
2012-01-05
System and method for on/off-chip characterization of pulse-width limiter outputs
Grant 8,054,119 - Boerstler , et al. November 8, 2
2011-11-08
Clock duty cycle measurement with charge pump without using reference clock calibration
Grant 8,041,537 - Qi , et al. October 18, 2
2011-10-18
Structure for interleaved voltage controlled oscillator
Grant 8,037,431 - Boerstler , et al. October 11, 2
2011-10-11
Controlling Bandwidth Reservations Method And Apparatus
App 20110246695 - Asano; Shigehiro ;   et al.
2011-10-06
Structure for an absolute duty cycle measurement circuit
Grant 8,032,850 - Boerstler , et al. October 4, 2
2011-10-04
Systems and methods for PLL linearity measurement, PLL output duty cycle measurement and duty cycle correction
Grant 7,994,830 - Kaneko , et al. August 9, 2
2011-08-09
Structure for a programmable interpolative voltage controlled oscillator with adjustable range
Grant 7,969,250 - Boerstler , et al. June 28, 2
2011-06-28
Design structure for a phase locked loop with stabilized dynamic response
Grant 7,958,469 - Boerstler , et al. June 7, 2
2011-06-07
Systems and Methods for PLL Linearity Measurement, PLL Output Duty Cycle Measurement and Duty Cycle Correction
App 20110121874 - Kaneko; Masaaki ;   et al.
2011-05-26
Design Structure for a Duty Cycle Correction Circuit
App 20110126162 - Boerstler; David W. ;   et al.
2011-05-26
Structure for a duty cycle measurement circuit
Grant 7,917,318 - Boerstler , et al. March 29, 2
2011-03-29
Digital circuit to measure and/or correct duty cycles
Grant 7,917,795 - Boerstler , et al. March 29, 2
2011-03-29
Structure for a duty cycle correction circuit
Grant 7,913,199 - Boerstler , et al. March 22, 2
2011-03-22
Absolute duty cycle measurement
Grant 7,904,264 - Boerstler , et al. March 8, 2
2011-03-08
Duty cycle measurement for various signals throughout an integrated circuit device
Grant 7,895,005 - Boerstler , et al. February 22, 2
2011-02-22
Structure for a phase locked loop with adjustable voltage based on temperature
Grant 7,877,222 - Boerstler , et al. January 25, 2
2011-01-25
High speed clock signal duty cycle adjustment
Grant 7,863,958 - Boerstler , et al. January 4, 2
2011-01-04
Interleaved voltage controlled oscillator
Grant 7,786,813 - Boerstler , et al. August 31, 2
2010-08-31
Interleaved voltage controlled oscillator
Grant 7,782,146 - Boerstler , et al. August 24, 2
2010-08-24
High Speed Clock Signal Duty Cycle Adjustment
App 20100164580 - Boerstler; David William ;   et al.
2010-07-01
System for automatically selecting intermediate power supply voltages for intermediate level shifters
Grant 7,747,892 - Boerstler , et al. June 29, 2
2010-06-29
Phase locked loop with temperature and process compensation
Grant 7,737,794 - Boerstler , et al. June 15, 2
2010-06-15
Method for controlling operation of microprocessor which performs duty cycle correction process
Grant 7,716,516 - Muraki , et al. May 11, 2
2010-05-11
Method and system for managing voltage swings across field effect transistors
Grant 7,701,269 - Boerstler , et al. April 20, 2
2010-04-20
Structure for precision integrated phase lock loop circuit loop filter
Grant 7,692,460 - Boerstler , et al. April 6, 2
2010-04-06
Duty cycle correction circuit whose operation is largely independent of operating voltage and process
Grant 7,675,338 - Boerstler , et al. March 9, 2
2010-03-09
Design structure for a duty cycle measurement apparatus that operates in a calibration mode and a test mode
Grant 7,646,177 - Boerstler , et al. January 12, 2
2010-01-12
Systems and methods for PLL linearity measurement, PLL output duty cycle measurement and duty cycle correction
Grant 7,642,863 - Kaneko , et al. January 5, 2
2010-01-05
DMAC translation mechanism
Grant 7,644,198 - King , et al. January 5, 2
2010-01-05
Clock Duty Cycle Measurement with Charge Pump Without Using Reference Clock Calibration
App 20090326862 - Qi; Jieming ;   et al.
2009-12-31
Method and Apparatus for On-Chip Testing of High Speed Frequency Dividers
App 20090322311 - Qi; Jieming ;   et al.
2009-12-31
Phase Locked Loop with Temperature and Process Compensation
App 20090285344 - Boerstler; David W. ;   et al.
2009-11-19
Method and apparatus for detecting frequency lock in a system including a frequency synthesizer
Grant 7,620,126 - Boerstler , et al. November 17, 2
2009-11-17
Method and apparatus for measuring the duty cycle of a digital signal
Grant 7,617,059 - Boerstler , et al. November 10, 2
2009-11-10
Duty cycle measurement method and apparatus that operates in a calibration mode and a test mode
Grant 7,595,675 - Boerstler , et al. September 29, 2
2009-09-29
Information handling system capable of detecting frequency lock of signals downstream from a signal synthesized by frequency synthesizer
Grant 7,590,194 - Boerstler , et al. September 15, 2
2009-09-15
Precision integrated phase lock loop circuit loop filter
Grant 7,589,575 - Boerstler , et al. September 15, 2
2009-09-15
Structure for a Programmable Interpolative Voltage Controlled Oscillator with Adjustable Range
App 20090183136 - Boerstler; David W. ;   et al.
2009-07-16
Systems and Methods for PLL Linearity Measurement, PLL Output Duty Cycle Measurement and Duty Cycle Correction
App 20090146743 - Kaneko; Masaaki ;   et al.
2009-06-11
Structure for a Duty Cycle Measurement Circuit
App 20090138834 - Boerstler; David W. ;   et al.
2009-05-28
Structure for a Circuit Obtaining Desired Phase Locked Loop Duty Cycle without Pre-Scaler
App 20090132971 - Boerstler; David W. ;   et al.
2009-05-21
Duty Cycle Measurement Method and Apparatus for Various Signals Throughout an Integrated Circuit Device
App 20090128133 - Boerstler; David W. ;   et al.
2009-05-21
Apparatus and Method for Obtaining Desired Phase Locked Loop Duty Cycle without Pre-Scaler
App 20090128206 - Boerstler; David W. ;   et al.
2009-05-21
Design Structure for an Absolute Duty Cycle Measurement Circuit
App 20090125857 - Boerstler; David W. ;   et al.
2009-05-14
Absolute Duty Cycle Measurement Method and Apparatus
App 20090125262 - Boerstler; David W. ;   et al.
2009-05-14
Method and System for Managing Voltage Swings Across Field Effect Transistors
App 20090108922 - Boerstler; David William ;   et al.
2009-04-30
Structure for Precision Integrated Phase Lock Loop Circuit Loop Filter
App 20090108923 - Boerstler; David William ;   et al.
2009-04-30
Precision Integrated Phase Lock Loop Circuit Loop Filter
App 20090108889 - Boerstler; David William ;   et al.
2009-04-30
Design Structure For A Duty Cycle Measurement Apparatus That Operates In A Calibration Mode And A Test Mode
App 20090112555 - Boerstler; David William ;   et al.
2009-04-30
Structure for Managing Voltage Swings Across Field Effect Transistors
App 20090108924 - Boerstler; David William ;   et al.
2009-04-30
Thermal sensing method and apparatus using existing ESD devices
Grant 7,519,498 - Boerstler , et al. April 14, 2
2009-04-14
Systems and methods for level shifting using AC coupling
Grant 7,511,554 - Kaneko , et al. March 31, 2
2009-03-31
Programmable Interpolative Voltage Controlled Oscillator with Adjustable Range
App 20090066424 - Boerstler; David W. ;   et al.
2009-03-12
Adjusting voltage for a phase locked loop based on temperature
Grant 7,493,229 - Boerstler , et al. February 17, 2
2009-02-17
Adjusting Voltage For A Phase Locked Loop Based On Temperature
App 20090024349 - Boerstler; David W. ;   et al.
2009-01-22
Structure for a Phase Locked Loop with Adjustable Voltage Based on Temperature
App 20090021314 - Boerstler; David W. ;   et al.
2009-01-22
Phase Locked Loop with Stabilized Dynamic Response
App 20090002038 - Boerstler; David W. ;   et al.
2009-01-01
Design Structure for a Phase Locked Loop with Stabilized Dynamic Response
App 20090007047 - Boerstler; David W. ;   et al.
2009-01-01
Systems and Methods for Level Shifting using AC Coupling
App 20080309395 - Kaneko; Masaaki ;   et al.
2008-12-18
Duty Cycle Correction Circuit Whose Operation is Largely Independent of Operating Voltage and Process
App 20080246524 - Boerstler; David W. ;   et al.
2008-10-09
Design Structure for a Duty Cycle Correction Circuit
App 20080229270 - Boerstler; David W. ;   et al.
2008-09-18
Interleaved Voltage Controlled Oscillator
App 20080222585 - Boerstler; David W. ;   et al.
2008-09-11
Method and apparatus for on-chip duty cycle measurement
Grant 7,420,400 - Boerstler , et al. September 2, 2
2008-09-02
Duty cycle correction circuit whose operation is largely independent of operating voltage and process
Grant 7,417,480 - Boerstler , et al. August 26, 2
2008-08-26
Interleaved Voltage Controlled Oscillator
App 20080191809 - Boerstler; David W. ;   et al.
2008-08-14
Interleaved Voltage Controlled Oscillator
App 20080186104 - Boerstler; David W. ;   et al.
2008-08-07
Method And Apparatus For Measuring The Duty Cycle Of A Digital Signal
App 20080174345 - Boerstler; David William ;   et al.
2008-07-24
System and method automatically selecting intermediate power supply voltages for intermediate level shifters
Grant 7,392,419 - Boerstler , et al. June 24, 2
2008-06-24
Interleaved voltage controlled oscillator
Grant 7,391,277 - Boerstler , et al. June 24, 2
2008-06-24
System For Automatically Selecting Intermediate Power Supply Voltages For Intermediate Level Shifters
App 20080143419 - Boerstler; David William ;   et al.
2008-06-19
Extracting a Maximum Pulse Width of a Pulse Width Limiter
App 20080136480 - Boerstler; David W. ;   et al.
2008-06-12
Automatic Calibration of a Reference Voltage
App 20080122495 - Boerstler; David William ;   et al.
2008-05-29
Digital Circuit To Measure And/or Correct Duty Cycles
App 20080111604 - Boerstler; David William ;   et al.
2008-05-15
Method and apparatus for measuring the relative duty cycle of a clock signal
Grant 7,363,178 - Boerstler , et al. April 22, 2
2008-04-22
Apparatus and method for extracting a maximum pulse width of a pulse width limiter
Grant 7,358,785 - Boerstler , et al. April 15, 2
2008-04-15
Apparatus and method for automatically self-calibrating a duty cycle circuit for maximum chip performance
Grant 7,360,135 - Boerstler , et al. April 15, 2
2008-04-15
System and method for automatic calibration of a reference voltage
Grant 7,356,716 - Boerstler , et al. April 8, 2
2008-04-08
Digital circuit to measure and/or correct duty cycles
Grant 7,350,095 - Boerstler , et al. March 25, 2
2008-03-25
DMAC Address Translation Miss Handling Mechanism
App 20080065855 - King; Matthew E. ;   et al.
2008-03-13
Method and apparatus for measuring the duty cycle of a digital signal
Grant 7,333,905 - Boerstler , et al. February 19, 2
2008-02-19
Method and apparatus for correcting the duty cycle of a digital signal
Grant 7,330,061 - Boerstler , et al. February 12, 2
2008-02-12
Interleaved Voltage Controlled Oscillator
App 20080018408 - Boerstler; David W. ;   et al.
2008-01-24
High frequency circuit capable of error detection and correction of code patterns running at full speed
Grant 7,321,651 - Boerstler , et al. January 22, 2
2008-01-22
Apparatus and method for automatically self-calibrating a duty cycle circuit for maximum chip performance
Grant 7,322,001 - Boerstler , et al. January 22, 2
2008-01-22
Duty Cycle Correction Circuit Whose Operation is Largely Independent of Operating Voltage and Process
App 20080012617 - Boerstler; David W. ;   et al.
2008-01-17
Method for controlling operation of microprocessor which performs duty cycle correction process
App 20070300082 - Muraki; Yosuke ;   et al.
2007-12-27
Apparatus and Method for Automatically Self-Calibrating a Duty Cycle Circuit for Maximum Chip Performance
App 20070300113 - Boerstler; David W. ;   et al.
2007-12-27
Method and Apparatus for Measuring the Relative Duty Cycle of a Clock Signal
App 20070271068 - Boerstler; David William ;   et al.
2007-11-22
Method And Apparatus For Measuring The Duty Cycle Of A Digital Signal
App 20070271051 - Boerstler; David William ;   et al.
2007-11-22
Duty Cycle Measurement Method And Apparatus That Operates In A Calibration Mode And A Test Mode
App 20070266285 - Boerstler; David William ;   et al.
2007-11-15
Duty Cycle Measurement Apparatus and Method
App 20070260409 - Boerstler; David W. ;   et al.
2007-11-08
Method And Apparatus For Correcting The Duty Cycle Of A Digital Signal
App 20070252629 - BOERSTLER; DAVID WILLIAM ;   et al.
2007-11-01
Method And Apparatus For On-chip Duty Cycle Measurement
App 20070255517 - Boerstler; David William ;   et al.
2007-11-01
System and method for examining high-frequency clock-masking signal patterns at full speed
Grant 7,289,926 - Boerstler , et al. October 30, 2
2007-10-30
Apparatus And Method For Extracting A Maximum Pulse Width Of A Pulse Width Limiter
App 20070236266 - Boerstler; David W. ;   et al.
2007-10-11
Level shifter system and method to minimize duty cycle error due to voltage differences across power domains
Grant 7,265,600 - Boerstler , et al. September 4, 2
2007-09-04
Duty cycle measurement apparatus and method
Grant 7,260,491 - Boerstler , et al. August 21, 2
2007-08-21
Apparatus and method for verifying glitch-free operation of a multiplexer
Grant 7,245,161 - Boerstler , et al. July 17, 2
2007-07-17
Level shifter apparatus and method for minimizing duty cycle distortion
Grant 7,245,172 - Boerstler , et al. July 17, 2
2007-07-17
Round robin selection logic improves area efficiency and circuit speed
Grant 7,231,479 - Handlogten , et al. June 12, 2
2007-06-12
Method and Apparatus for Semi-Automatic Extraction and Monitoring of Diode Ideality in a Manufacturing Environment
App 20070126475 - Boerstler; David W. ;   et al.
2007-06-07
Level shifter apparatus and method for minimizing duty cycle distortion
App 20070103215 - Boerstler; David W. ;   et al.
2007-05-10
Duty cycle measurement apparatus and method
App 20070100505 - Boerstler; David W. ;   et al.
2007-05-03
Apparatus And Method For Providing A Reprogrammable Electrically Programmable Fuse
App 20070081406 - Boerstler; David W. ;   et al.
2007-04-12
System and method for improved DMAC translation mechanism
App 20070083680 - King; Matthew Edward ;   et al.
2007-04-12
Level shifter system and method to minimize duty cycle error due to voltage differences across power domains
App 20070075764 - Boerstler; David W. ;   et al.
2007-04-05
Thermal sensing method and apparatus using existing ESD devices
App 20070075370 - Boerstler; David W. ;   et al.
2007-04-05
Apparatus and method for automatically self-calibrating a duty cycle circuit for maximum chip performance
App 20070079197 - Boerstler; David W. ;   et al.
2007-04-05
Apparatus and method for providing a reprogrammable electrically programmable fuse
Grant 7,200,064 - Boerstler , et al. April 3, 2
2007-04-03
Method and apparatus for detecting frequency lock in a system including a frequency synthesizer
App 20070071154 - Boerstler; David William ;   et al.
2007-03-29
Information handling system capable of detecting frequency lock of signals downstream from a signal synthesized by frequency synthesizer
App 20070071155 - Boerstler; David William ;   et al.
2007-03-29
Apparatus and method for verifying glitch-free operation of a multiplexer
App 20070057697 - Boerstler; David W. ;   et al.
2007-03-15
Self-biased high speed level shifter circuit
App 20070008003 - Boerstler; David William ;   et al.
2007-01-11
System and method automatically selecting intermediate power supply voltages for intermediate level shifters
App 20070001739 - Boerstler; David William ;   et al.
2007-01-04
System and method for examining high-frequency clock-masking signal patterns at full speed
App 20070005279 - Boerstler; David W. ;   et al.
2007-01-04
Circuit for minimizing filter capacitance leakage induced jitter in phase locked loops (PPLs)
Grant 7,132,896 - Boerstler , et al. November 7, 2
2006-11-07
System and method for on/off-chip characterization of pulse-width limiter outputs
App 20060232310 - Boerstler; David William ;   et al.
2006-10-19
Method and apparatus for semi-automatic extraction and monitoring of diode ideality in a manufacturing environment
Grant 7,113,881 - Boerstler , et al. September 26, 2
2006-09-26
Digital circuit to measure and/or correct duty cycles
App 20060212739 - Boerstler; David William ;   et al.
2006-09-21
System and method for automatic calibration of a reference voltage
App 20060190746 - Boerstler; David William ;   et al.
2006-08-24
High frequency circuit capable of error detection and correction of code patterns running at full speed
App 20060117236 - Boerstler; David W. ;   et al.
2006-06-01
Method and apparatus for semi-automatic extraction and monitoring of diode ideality in a manufacturing environment
App 20060107242 - Boerstler; David W. ;   et al.
2006-05-18
Novel circuit for minimizing filter capacitance leakage induced jitter in phase locked loops (PLLs)
App 20060091965 - Boerstler; David William ;   et al.
2006-05-04
Systems and methods for operating logic circuits
Grant 7,030,658 - Murakami , et al. April 18, 2
2006-04-18
Method and apparatus for use in booth-encoded multiplication
Grant 7,024,445 - Qi April 4, 2
2006-04-04
Read/write methods for limited memory access applications
App 20060023552 - Aipperspach; Anthony Gus ;   et al.
2006-02-02
Systems and methods for operating logic circuits
App 20050162186 - Murakami, Hiroaki ;   et al.
2005-07-28
Round robin selection logic improves area efficiency and circuit speed
App 20050138055 - Handlogten, Glen Howard ;   et al.
2005-06-23
Controlling bandwidth reservations method and apparatus
App 20050111354 - Asano, Shigehiro ;   et al.
2005-05-26
Multiplexer methods and apparatus
Grant 6,822,486 - King , et al. November 23, 2
2004-11-23
High speed, static digital multiplexer
Grant 6,819,141 - Qi , et al. November 16, 2
2004-11-16
Method and apparatus for use in booth-encoded multiplication
App 20030120694 - Qi, Jieming
2003-06-26

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.

© 2024 USPTO.report | Privacy Policy | Resources | RSS Feed of Trademarks | Trademark Filings Twitter Feed