Pyapali; Rambabu

Patent Applications and Registrations

Patent applications and USPTO patent grants for Pyapali; Rambabu.The latest application filed is for "low leakage spare gates for integrated circuits".

Company Profile

0.9.9

Pyapali; Rambabu - Cupertino CA US
Pyapali; Rambabu - Santa Clara CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Low leakage spare gates for integrated circuits Grant 8,810,280 - Pyapali , et al. August 19, 2	2014-08-19
Low Leakage Spare Gates For Integrated Circuits App 20130088261 - PYAPALI; Rambabu ; et al.	2013-04-11
Automatic block composition tool for composing custom blocks having non-standard library cells in an integrated circuit design flow Grant 7,890,909 - Pyapali , et al. February 15, 2	2011-02-15
Automatic Block Composition Tool For Composing Custom Blocks Having Non-standard Library Cells In An Integrated Circuit Design Flow App 20090172622 - Pyapali; Rambabu ; et al.	2009-07-02
Method and software for predicting the timing delay of a circuit path using two different timing models Grant 7,484,193 - Sarkar , et al. January 27, 2	2009-01-27
Estimating capacitances using information including feature sizes extracted from a netlist Grant 7,036,096 - Sarkar , et al. April 25, 2	2006-04-25
Method and apparatus for power consumption analysis in global nets Grant 7,007,256 - Sarkar , et al. February 28, 2	2006-02-28
Method and apparatus for signal electromigration analysis Grant 6,954,914 - Sundar , et al. October 11, 2	2005-10-11
Method and software for improved circuit path timing predictions, and circuit design produced therewith App 20050050405 - Sarkar, Aveek ; et al.	2005-03-03
Method and apparatus for signal electromigration analysis App 20040194043 - Sundar, Shyam ; et al.	2004-09-30
Method and apparatus for power consumption analysis in global nets App 20040177328 - Sarkar, Aveek ; et al.	2004-09-09
Reconfigurable multi-chip modules Grant 6,779,131 - Pyapali , et al. August 17, 2	2004-08-17
Method and apparatus for waiving noise violations App 20040049745 - Rahman, Mohammed M. ; et al.	2004-03-11
Method for double-layer implementation of metal options in an integrated chip for efficient silicon debug Grant 6,596,563 - Yuan , et al. July 22, 2	2003-07-22
Reconfigurable multi-chip modules App 20020194447 - Pyapali, Rambabu ; et al.	2002-12-19
Method for double-layer implementation of metal options in an integrated chip for efficient silicon debug App 20020096774 - Yuan, Xuejun ; et al.	2002-07-25

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