Puttlitz; Karl J.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Puttlitz; Karl J..The latest application filed is for "stress resistant land grid array (lga) module and method of forming the same".

Company Profile

0.12.2

Puttlitz; Karl J. - Wappingers Falls NY
Puttlitz; Karl J. - Dutchess County NY

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Stress resistant land grid array (LGA) module and method of forming the same Grant 6,964,885 - Coico , et al. November 15, 2	2005-11-15
Stress resistant land grid array (LGA) module and method of forming the same App 20040141296 - Coico, Patrick Anthony ; et al.	2004-07-22
Stress resistant land grid array (LGA) module and method of forming the same Grant 6,703,560 - Coico , et al. March 9, 2	2004-03-09
Stress resistant land grid array (LGA) module and method of forming the same App 20020050398 - Coico, Patrick Anthony ; et al.	2002-05-02
Zero force heat sink Grant 6,212,070 - Atwood , et al. April 3, 2	2001-04-03
Method for restraining circuit board warp during area array rework Grant 5,862,588 - Heim , et al. January 26, 1	1999-01-26
Zero force heat sink Grant 5,805,430 - Atwood , et al. September 8, 1	1998-09-08
Electrically conductive and abrasion/scratch resistant polymeric materials, method of fabrication thereof and uses thereof Grant 5,721,299 - Angelopoulos , et al. February 24, 1	1998-02-24
Method for removing meltable material from a substrate Grant 5,458,281 - Downing , et al. October 17, 1	1995-10-17
Porous metal block for removing solder or braze from a substate and a process for making the same Grant 5,284,286 - Brofman , et al. February 8, 1	1994-02-08
Method of forming dual height solder interconnections Grant 5,251,806 - Agarwala , et al. October 12, 1	1993-10-12
Solder mass having conductive encapsulating arrangement Grant 5,130,779 - Agarwala , et al. July 14, 1	1992-07-14
Solder interconnection structure for joining semiconductor devices to substrates that have improved fatigue life, and process for making Grant 4,604,644 - Beckham , et al. August 5, 1	1986-08-05
Individual chip joining machine Grant 4,160,893 - Meyen , et al. July 10, 1	1979-07-10

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