| Patent | Date |
|---|
Memory Device Including Calibration Operation And Transistor Having Adjustable Threshold Voltage
App 20220310620 - Kanago; Anthony J. ; et al. | 2022-09-29 |
Integrated assemblies
Grant 11,411,118 - Pulugurtha , et al. August 9, 2 | 2022-08-09 |
Integrated assemblies and methods of forming integrated assemblies
Grant 11,335,775 - Pulugurtha , et al. May 17, 2 | 2022-05-17 |
Apparatuses having memory cells with two transistors and one capacitor, and having body regions of the transistors coupled with reference voltages
Grant 11,302,703 - Karda , et al. April 12, 2 | 2022-04-12 |
Integrated Assemblies
App 20220077320 - Pulugurtha; Srinivas ; et al. | 2022-03-10 |
Integrated Assemblies and Methods of Forming Integrated Assemblies
App 20220069082 - Pulugurtha; Srinivas ; et al. | 2022-03-03 |
Metal Insulator Semiconductor (mis) Contact In Three Dimensional (3d) Vertical Memory
App 20220068929 - Karda; Kamal M. ; et al. | 2022-03-03 |
Integrated Assemblies and Methods of Forming Integrated Assemblies
App 20220069083 - Pulugurtha; Srinivas ; et al. | 2022-03-03 |
Apparatuses Including Memory Cells And Related Methods
App 20210375925 - Huang; Guangyu ; et al. | 2021-12-02 |
Three-dimensional Memory Device With Wiggled Drain-select-level Isolation Structure And Methods Of Manufacturing The Same
App 20210358946 - PULUGURTHA; Srinivas ; et al. | 2021-11-18 |
Apparatuses Including Transistors, And Related Methods, Memory Devices, And Electronic Systems
App 20210351182 - Yang; Litao ; et al. | 2021-11-11 |
Integrated Assemblies having Conductive Material Along Three of Four Sides Around Active Regions, and Methods of Forming Integrated Assemblies
App 20210351087 - Yang; Litao ; et al. | 2021-11-11 |
Underbody contact to horizontal access devices for vertical three-dimensional (3D) memory
Grant 11,164,872 - Pulugurtha , et al. November 2, 2 | 2021-11-02 |
Integrated Assemblies Having Shield Lines Between Digit Lines, and Methods of Forming Integrated Assemblies
App 20210327883 - Tang; Sanh D. ; et al. | 2021-10-21 |
Memory Device Having 2-transistor Vertical Memory Cell
App 20210272965 - Pulugurtha; Srinivas ; et al. | 2021-09-02 |
Apparatuses including memory cells and related methods
Grant 11,107,832 - Huang , et al. August 31, 2 | 2021-08-31 |
Apparatus with doped surfaces, and related methods with in situ doping
Grant 11,088,147 - Guha , et al. August 10, 2 | 2021-08-10 |
Integrated assemblies having shield lines between digit lines, and methods of forming integrated assemblies
Grant 11,069,687 - Tang , et al. July 20, 2 | 2021-07-20 |
Memory arrays, and methods of forming memory arrays
Grant 11,004,494 - Tang , et al. May 11, 2 | 2021-05-11 |
Integrated Assemblies, and Methods of Forming Integrated Assemblies
App 20210125997 - Yang; Litao ; et al. | 2021-04-29 |
Memory device having 2-transistor vertical memory cell
Grant 10,892,264 - Pulugurtha , et al. January 12, 2 | 2021-01-12 |
Apparatus With Doped Surfaces, And Related Methods With In Situ Doping
App 20200411529 - Guha; Jaydip ; et al. | 2020-12-31 |
Recessed access devices and DRAM constructions
Grant 10,825,816 - Gao , et al. November 3, 2 | 2020-11-03 |
Asymmetric source/drain regions of transistors
Grant 10,797,135 - Lee , et al. October 6, 2 | 2020-10-06 |
Integrated Assemblies Having Shield Lines Between Digit Lines, and Methods of Forming Integrated Assemblies
App 20200286895 - Tang; Sanh D. ; et al. | 2020-09-10 |
Apparatuses Including Memory Cells And Related Methods
App 20200219899 - Huang; Guangyu ; et al. | 2020-07-09 |
Vertical 2-transistor Memory Cell
App 20200212045 - Karda; Kamal M. ; et al. | 2020-07-02 |
Memory Device Having 2-transistor Vertical Memory Cell
App 20200212050 - Pulugurtha; Srinivas ; et al. | 2020-07-02 |
Apparatuses Having Memory Cells with Two Transistors and One Capacitor, and Having Body Regions of the Transistors Coupled with
App 20200203338 - Karda; Kamal M. ; et al. | 2020-06-25 |
Asymmetric Source/drain Regions Of Transistors
App 20200176564 - Lee; Si-Woo ; et al. | 2020-06-04 |
Memory devices including memory cells and related methods
Grant 10,608,012 - Huang , et al. | 2020-03-31 |
Apparatuses having memory cells with two transistors and one capacitor, and having body regions of the transistors coupled with reference voltages
Grant 10,607,988 - Karda , et al. | 2020-03-31 |
Apparatuses Having Memory Cells with Two Transistors and One Capacitor, and Having Body Regions of the Transistors Coupled with
App 20190259769 - Karda; Kamal M. ; et al. | 2019-08-22 |
Apparatuses having memory cells with two transistors and one capacitor, and having body regions of the transistors coupled with reference voltages
Grant 10,381,357 - Karda , et al. A | 2019-08-13 |
Recessed Access Devices And DRAM Constructions
App 20190206870 - Gao; Yunfei ; et al. | 2019-07-04 |
Memory Arrays, and Methods of Forming Memory Arrays
App 20190172517 - Tang; Sanh D. ; et al. | 2019-06-06 |
Memory arrays, and methods of forming memory arrays
Grant 10,242,726 - Tang , et al. | 2019-03-26 |
Memory Devices Including Vertical Memory Cells And Related Methods
App 20190067326 - Huang; Guangyu ; et al. | 2019-02-28 |
Apparatuses Having Memory Cells with Two Transistors and One Capacitor, and Having Body Regions of the Transistors Coupled with Reference Voltages
App 20190067298 - Karda; Kamal M. ; et al. | 2019-02-28 |
Memory arrays, and methods of forming memory arrays
Grant 10,153,027 - Tang , et al. Dec | 2018-12-11 |
Memory arrays
Grant 10,083,734 - Tang , et al. September 25, 2 | 2018-09-25 |
Vertical access devices, semiconductor device structures, and related methods
Grant 9,773,888 - Pulugurtha , et al. September 26, 2 | 2017-09-26 |
Passing access line structure in a memory device
Grant 9,761,590 - Pulugurtha , et al. September 12, 2 | 2017-09-12 |
Apparatuses having a vertical memory cell
Grant 9,577,092 - Karda , et al. February 21, 2 | 2017-02-21 |
Semiconductor devices including vertical memory cells and methods of forming same
Grant 9,373,715 - Mueller , et al. June 21, 2 | 2016-06-21 |
Passing access line structure in a memory device
Grant 9,349,737 - Pulugurtha , et al. May 24, 2 | 2016-05-24 |
Passing Access Line Structure In A Memory Device
App 20160104709 - Pulugurtha; Srinivas ; et al. | 2016-04-14 |
Vertical Access Devices, Semiconductor Device Structures, And Related Methods
App 20150243748 - Pulugurtha; Srinivas ; et al. | 2015-08-27 |
Semiconductor Devices Including Vertical Memory Cells And Methods Of Forming Same
App 20150129955 - Mueller; Wolfgang ; et al. | 2015-05-14 |
Apparatuses Having A Vertical Memory Cell
App 20150054063 - Karda; Kamal M. ; et al. | 2015-02-26 |
Vertical access device and apparatuses having a body connection line, and related method of operating the same
Grant 8,878,271 - Karda , et al. November 4, 2 | 2014-11-04 |
Vertical Access Device And Apparatuses Having A Body Connection Line, And Related Method Of Operating The Same
App 20140247674 - Karda; Kamal M. ; et al. | 2014-09-04 |
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