loadpatents
name:-0.0043759346008301
name:-0.013264894485474
name:-0.00041985511779785
Pugh; Daniel J. Patent Filings

Pugh; Daniel J.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Pugh; Daniel J..The latest application filed is for "gold code generator design".

Company Profile
0.15.3
  • Pugh; Daniel J. - San Jose CA
  • Pugh; Daniel J. - Los Gatos CA US
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Performing mathematical and logical operations in multiple sub-cycles
Grant 8,463,836 - Pugh , et al. June 11, 2
2013-06-11
System and method of providing a memory hierarchy
Grant 8,434,045 - Schmit , et al. April 30, 2
2013-04-30
IC that efficiently replicates a function to save logic and routing resources
Grant 7,971,172 - Pugh , et al. June 28, 2
2011-06-28
System and method of providing a memory hierarchy
Grant 7,930,666 - Schmit , et al. April 19, 2
2011-04-19
Method and apparatus for performing two's complement multiplication
Grant 7,818,361 - Pugh October 19, 2
2010-10-19
Use of hybrid interconnect/logic circuits for multiplication
Grant 7,765,249 - Pugh , et al. July 27, 2
2010-07-27
System and method of mapping memory blocks in a configurable integrated circuit
Grant 7,587,697 - Schmit , et al. September 8, 2
2009-09-08
Hybrid interconnect/logic circuits enabling efficient replication of a function in several sub-cycles to save logic and routing resources
Grant 7,372,297 - Pugh , et al. May 13, 2
2008-05-13
Gold code generator design
Grant 7,080,107 - Pugh , et al. July 18, 2
2006-07-18
Field programmable gate array core cell with efficient logic packing
Grant 7,009,421 - Pugh , et al. March 7, 2
2006-03-07
Gold code generator design
App 20050273480 - Pugh, Daniel J. ;   et al.
2005-12-08
Method and implemention of a traceback-free parallel viterbi decoder
Grant 6,904,105 - Pugh June 7, 2
2005-06-07
Field programmable gate array core cell with efficient logic packing
App 20050040849 - Pugh, Daniel J. ;   et al.
2005-02-24
Gold code generator design
Grant 6,834,291 - Pugh , et al. December 21, 2
2004-12-21
Field programmable gate array core cell with efficient logic packing
Grant 6,801,052 - Pugh , et al. October 5, 2
2004-10-05
Field programmable gate array core cell with efficient logic packing
App 20030085733 - Pugh, Daniel J. ;   et al.
2003-05-08

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.

© 2024 USPTO.report | Privacy Policy | Resources | RSS Feed of Trademarks | Trademark Filings Twitter Feed