Puar; Deepraj S.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Puar; Deepraj S..The latest application filed is for "graphics controller integrated circuit without memory interface".

Company Profile

0.14.5

Puar; Deepraj S. - Sunnyvale CA
Puar; Deepraj S. - San Jose CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Graphics Controller Integrated Circuit Without Memory Interface App 20120188260 - Puar; Deepraj S. ; et al.	2012-07-26
Graphics Controller Integrated Circuit without Memory Interface App 20060208764 - Puar; Deepraj S. ; et al.	2006-09-21
Graphics controller integrated circuit without memory interface Grant 7,106,619 - Puar , et al. September 12, 2	2006-09-12
Graphics Controller Integrated Circuit without Memory Interface App 20050180225 - Puar, Deepraj S. ; et al.	2005-08-18
Graphics controller integrated circuit without memory interface Grant 6,920,077 - Puar , et al. July 19, 2	2005-07-19
Graphics controller integrated circuit without memory interface App 20040179015 - Puar, Deepraj S. ; et al.	2004-09-16
Graphics controller integrated circuit without memory interface Grant 6,771,532 - Puar , et al. August 3, 2	2004-08-03
Graphics controller integrated circuit without memory interface App 20020149560 - Puar, Deepraj S. ; et al.	2002-10-17
Graphics controller integrated circuit without memory interface Grant 6,356,497 - Puar , et al. March 12, 2	2002-03-12
NMOS dynamic content-addressable-memory CAM cell with self-booting pass transistors and local row and column select Grant 6,078,513 - Ong , et al. June 20, 2	2000-06-20
Graphics controller integrated circuit without memory interface pins and associated power dissipation Grant 6,041,010 - Puar , et al. March 21, 2	2000-03-21
Graphics controller integrated circuit without memory interface Grant 5,703,806 - Puar , et al. December 30, 1	1997-12-30
Graphics controller integrated circuit without memory interface Grant 5,650,955 - Puar , et al. July 22, 1	1997-07-22
Dynamic logic having power-down mode with periodic clock refresh for a low-power graphics controller Grant 5,587,672 - Ranganathan , et al. December 24, 1	1996-12-24
Multiple probing of an auxilary test pad which allows for reliable bonding to a primary bonding pad Grant 5,506,499 - Puar April 9, 1	1996-04-09
Shunt circuit for electrostatic discharge protection Grant 5,287,241 - Puar February 15, 1	1994-02-15
Depletion-mode FET for the regulation of the on-chip generated substrate bias voltage Grant 4,739,191 - Puar April 19, 1	1988-04-19
Sense and refresh amplifier circuit Grant 4,508,980 - Puar April 2, 1	1985-04-02
Semiconductor memory array Grant 4,342,102 - Puar July 27, 1	1982-07-27

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