| Patent | Date |
|---|
Binary logic unit and method to operate a binary logic unit
Grant 8,756,263 - Gemmeke , et al. June 17, 2 | 2014-06-17 |
Reuse of rounder for fixed conversion of log instructions
Grant 8,626,807 - Boersma , et al. January 7, 2 | 2014-01-07 |
Zero indication forwarding for floating point unit power reduction
Grant 8,578,196 - Barowski , et al. November 5, 2 | 2013-11-05 |
Distributed residue-checking of a floating point unit
Grant 8,566,383 - Dao , et al. October 22, 2 | 2013-10-22 |
Binary Logic Unit and Method to Operate a Binary Logic Unit
App 20130181743 - Gemmeke; Tobias ; et al. | 2013-07-18 |
Binary logic unit and method to operate a binary logic unit
Grant 8,452,824 - Gemmeke , et al. May 28, 2 | 2013-05-28 |
Fast floating point compare with slower backup for corner cases
Grant 8,407,275 - Boersma , et al. March 26, 2 | 2013-03-26 |
Electronic computing circuit for operand width reduction for a modulo adder followed by saturation concurrent message processing
Grant 8,370,409 - Gemmeke , et al. February 5, 2 | 2013-02-05 |
Efficient forcing of corner cases in a floating point rounder
Grant 8,352,531 - Boersma , et al. January 8, 2 | 2013-01-08 |
System and method for storing numbers in first and second formats in a register file
Grant 8,346,828 - Boersma , et al. January 1, 2 | 2013-01-01 |
Shifter with all-one and all-zero detection using a portion of partially shifted vector and shift amount in parallel to generated shifted result
Grant 8,332,453 - Boersma , et al. December 11, 2 | 2012-12-11 |
Zero Indication Forwarding for Floating Point Unit Power Reduction
App 20120284548 - Barowski; Harry S. ; et al. | 2012-11-08 |
Supporting multiple formats in a floating point processor
Grant 8,291,003 - Boersma , et al. October 16, 2 | 2012-10-16 |
Zero indication forwarding for floating point unit power reduction
Grant 8,255,726 - Barowski , et al. August 28, 2 | 2012-08-28 |
Normalizer shift prediction for log estimate instructions
Grant 8,244,783 - Boersma , et al. August 14, 2 | 2012-08-14 |
3-stack floorplan for floating point unit
Grant 8,032,854 - Boersma , et al. October 4, 2 | 2011-10-04 |
Semiconductor chip with a plurality of scannable storage elements and a method for scanning storage elements on a semiconductor chip
Grant 7,996,738 - Gemmeke , et al. August 9, 2 | 2011-08-09 |
Reuse Of Rounder For Fixed Conversion Of Log Instructions
App 20100174764 - Boersma; Maarten ; et al. | 2010-07-08 |
Shifter With All-one And All-zero Detection
App 20100146023 - Boersma; Maarten ; et al. | 2010-06-10 |
Design structure to reduce power consumption within a clock gated synchronous circuit and clock gated synchronous circuit
Grant 7,735,038 - Gemmeke , et al. June 8, 2 | 2010-06-08 |
Fast Floating Point Compare With Slower Backup For Corner Cases
App 20100100713 - Boersma; Maarten J. ; et al. | 2010-04-22 |
Distributed Residue-checking Of A Floating Point Unit
App 20100100578 - Dao; Son Trong ; et al. | 2010-04-22 |
System And Method For Storing Numbers In First And Second Formats In A Register File
App 20100095099 - Boersma; Maarten ; et al. | 2010-04-15 |
Multiplexing output from second execution unit add/saturation processing portion of wider width intermediate result of first primitive execution unit for compound computation
Grant 7,694,112 - Barowski , et al. April 6, 2 | 2010-04-06 |
Normalizer Shift Prediction For Log Estimate Instructions
App 20100063985 - Boersma; Maarten J. ; et al. | 2010-03-11 |
Supporting Multiple Formats In A Floating Point Processor
App 20100063987 - Boersma; Maarten J. ; et al. | 2010-03-11 |
Method And Electronic Computing Circuit For Operand Width Reduction For A Modulo Adder Followed By Saturation Concurrent Message Processing
App 20100057825 - Gemmeke; Tobias ; et al. | 2010-03-04 |
3-Stack Floorplan for Floating Point Unit
App 20100058266 - Boersma; Maarten ; et al. | 2010-03-04 |
Efficient Forcing Of Corner Cases In A Floating Point Rounder
App 20100023573 - Boersma; Maarten J. ; et al. | 2010-01-28 |
Zero Indication Forwarding For Floating Point Unit Power Reduction
App 20100017635 - BAROWSKI; HARRY S. ; et al. | 2010-01-21 |
Method to reduce power consumption within a clock gated synchronous circuit and clock gated synchronous circuit
Grant 7,639,046 - Gemmeke , et al. December 29, 2 | 2009-12-29 |
Methods For Conflict-free, Cooperative Execution Of Computational Primitives On Multiple Execution Units
App 20090198974 - Barowski; Harry S. ; et al. | 2009-08-06 |
Method For Sign-extension In A Multi-precision Multiplier
App 20090198758 - Barowski; Harry S. ; et al. | 2009-08-06 |
Floating point unit with fused multiply add and method for calculating a result with a floating point unit
Grant 7,461,117 - Trong , et al. December 2, 2 | 2008-12-02 |
Semiconductor Chip With A Plurality Of Scannable Storage Elements And A Method For Scanning Storage Elements On A Semiconductor Chip
App 20080276140 - Gemmeke; Tobias ; et al. | 2008-11-06 |
Design Structure To Reduce Power Consumption Within A Clock Gated Synchronous Circuit And Clock Gated Synchronous Circuit
App 20080169842 - Gemmeke; Tobias ; et al. | 2008-07-17 |
Method To Reduce Power Consumption Within A Clock Gated Synchronous Circuit And Clock Gated Synchronous Circuit
App 20080169841 - Gemmeke; Tobias ; et al. | 2008-07-17 |
Binary Logic Unit and Method to Operate a Binary Logic Unit
App 20080162897 - Gemmeke; Tobias ; et al. | 2008-07-03 |
Leading-Zero Counter and Method to Count Leading Zeros
App 20070050435 - Jacobi; Christian ; et al. | 2007-03-01 |
Method and Processor for Performing a Floating-Point Instruction Within a Processor
App 20070038693 - Jacobi; Christian ; et al. | 2007-02-15 |
Floating point unit with fused multiply add and method for calculating a result with a floating point unit
App 20060184601 - Trong; Son Dao ; et al. | 2006-08-17 |
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