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Patent applications and USPTO patent grants for Prein; Frank.The latest application filed is for "manufacturing self-aligned polysilicon fet devices isolated with maskless shallow trench isolation and gate conductor fill technology with active devices and dummy doped regions formed in mesas".
Patent | Date |
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Manufacturing self-aligned polysilicon fet devices isolated with maskless shallow trench isolation and gate conductor fill technology with active devices and dummy doped regions formed in mesas Grant 6,103,592 - Levy , et al. August 15, 2 | 2000-08-15 |
Method of maximizing chip yield for semiconductor wafers Grant 6,070,004 - Prein May 30, 2 | 2000-05-30 |
Integrated multi-layer test pads and methods therefor Grant 5,981,302 - Alswede , et al. November 9, 1 | 1999-11-09 |
Integrated multi-layer test pads Grant 5,917,197 - Alswede , et al. June 29, 1 | 1999-06-29 |
Method of reducing loading variation during etch processing Grant 5,899,706 - Kluwe , et al. May 4, 1 | 1999-05-04 |
Fuse element for effective laser blow in an integrated circuit device Grant 5,608,257 - Lee , et al. March 4, 1 | 1997-03-04 |
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