| Patent | Date |
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Method and system for enumerating digital circuits in a system-on-a-chip (SOC)
Grant 10,628,375 - Chadwick, Jr. , et al. | 2020-04-21 |
Method and system for enumerating digital circuits in a system-on-a-chip (SOC)
Grant 10,628,376 - Chadwick, Jr. , et al. | 2020-04-21 |
Method And System For Enumerating Digital Circuits In A System-on-a-chip (soc)
App 20190332571 - CHADWICK, JR.; Thomas B. ; et al. | 2019-10-31 |
Method And System For Enumerating Digital Circuits In A System-on-a-chip (soc)
App 20190332570 - CHADWICK, JR.; Thomas B. ; et al. | 2019-10-31 |
Method and system for enumerating digital circuits in a system-on-a-chip (SOC)
Grant 10,423,570 - Chadwick, Jr. , et al. Sept | 2019-09-24 |
Method and system for enumerating digital circuits in a system-on-a-chip (SOC)
Grant 10,394,752 - Chadwick, Jr. , et al. A | 2019-08-27 |
Method And System For Enumerating Digital Circuits In A System-on-a-chip (soc)
App 20170161229 - CHADWICK, JR.; Thomas B. ; et al. | 2017-06-08 |
Method And System For Enumerating Digital Circuits In A System-on-a-chip (soc)
App 20170161225 - CHADWICK, JR.; Thomas B. ; et al. | 2017-06-08 |
Method and system for enumerating digital circuits in a system-on-a-chip (SOC)
Grant 9,672,185 - Chadwick, Jr. , et al. June 6, 2 | 2017-06-06 |
Method And System For Enumerating Digital Circuits In A System-on-a-chip (soc)
App 20150095541 - CHADWICK, Jr.; Thomas B. ; et al. | 2015-04-02 |
Staggered start of BIST controllers and BIST engines
Grant 8,935,586 - Chickanosky , et al. January 13, 2 | 2015-01-13 |
Staggered Start Of Bist Controllers And Bist Engines
App 20140129888 - Chickanosky; Valerie H. ; et al. | 2014-05-08 |
Structures including circuits for noise reduction in digital systems
Grant 8,037,337 - Pratt , et al. October 11, 2 | 2011-10-11 |
Supervisory operating system for running multiple child operating systems simultaneously and optimizing resource usage
Grant 7,873,961 - Miller , et al. January 18, 2 | 2011-01-18 |
High bandwidth low-latency semaphore mapped protocol (SMP) for multi-core systems on chips
Grant 7,765,351 - Nsame , et al. July 27, 2 | 2010-07-27 |
Design Structures Including Circuits For Noise Reduction In Digital Systems
App 20090138676 - Pratt; Nancy H. ; et al. | 2009-05-28 |
Noise reduction in digital systems when the noise is caused by simultaneously clocking data registers
Grant 7,463,083 - Pratt , et al. December 9, 2 | 2008-12-09 |
Design Structure for Localized Control Caching Resulting in Power Efficient Control Logic
App 20080229074 - Miller; Laura F. ; et al. | 2008-09-18 |
High Bandwidth Low-Latency Semaphore Mapped Protocol (SMP) For Multi-Core Systems On Chips
App 20080229006 - Nsame; Pascal A. ; et al. | 2008-09-18 |
Noise Reduction In Digital Systems
App 20080068073 - Pratt; Nancy H. ; et al. | 2008-03-20 |
Noise reduction in digital systems
Grant 7,317,348 - Pratt , et al. January 8, 2 | 2008-01-08 |
Localized Control Caching Resulting In Power Efficient Control Logic
App 20070294519 - Miller; Laura F. ; et al. | 2007-12-20 |
Noise Reduction In Digital Systems
App 20070288787 - Pratt; Nancy H. ; et al. | 2007-12-13 |
Supervisory Operating System For Running Multiple Child Operating Systems Simultaneously And Optimizing Resource Usage
App 20070028151 - Miller; Laura F. ; et al. | 2007-02-01 |
Noise Reduction In Digital Systems
App 20060082398 - Pratt; Nancy H. ; et al. | 2006-04-20 |
Auto-linking of function logic state with testcase regression list
Grant 6,934,656 - Norman , et al. August 23, 2 | 2005-08-23 |
Auto-linking Of Function Logic State With Testcase Regression List
App 20050096862 - Norman, Jason Michael ; et al. | 2005-05-05 |
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