loadpatents
name:-0.18842196464539
name:-0.21828293800354
name:-0.10548806190491
Pranatharthiharan; Balasubramanian Patent Filings

Pranatharthiharan; Balasubramanian

Patent Applications and Registrations

Patent applications and USPTO patent grants for Pranatharthiharan; Balasubramanian.The latest application filed is for "substrate thinning for a backside power distribution network".

Company Profile
92.177.171
  • Pranatharthiharan; Balasubramanian - Watervliet NY
  • Pranatharthiharan; Balasubramanian - Santa Clara CA
  • Pranatharthiharan; Balasubramanian - Watervilet NY
  • Pranatharthiharan; Balasubramanian - Waterliet NY
  • Pranatharthiharan; Balasubramanian - Watervkuet NY
  • Pranatharthiharan; Balasubramanian - Latham NY
  • Pranatharthiharan; Balasubramanian - Elmsford NY
  • Pranatharthiharan; Balasubramanian - Hopewell Junction NY
  • Pranatharthiharan; Balasubramanian - Yorktown Heights NY
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Substrate Thinning For A Backside Power Distribution Network
App 20220301878 - Xie; Ruilong ;   et al.
2022-09-22
Fin cut to prevent replacement gate collapse on STI
Grant 11,315,922 - Greene , et al. April 26, 2
2022-04-26
Approach to bottom dielectric isolation for vertical transport fin field effect transistors
Grant 11,302,797 - Bi , et al. April 12, 2
2022-04-12
Phase Change Memory Using Multiple Phase Change Layers And Multiple Heat Conductors
App 20220102627 - Ok; Injo ;   et al.
2022-03-31
Phase change memory using multiple phase change layers and multiple heat conductors
Grant 11,271,151 - Ok , et al. March 8, 2
2022-03-08
Confined phase change memory with double air gap
Grant 11,063,216 - Ok , et al. July 13, 2
2021-07-13
Semiconductor Structures Including Middle-of-line (mol) Capacitance Reduction For Self-aligned Contact In Gate Stack
App 20210210596 - Ok; Injo ;   et al.
2021-07-08
Minimizing Shorting Between Finfet Epitaxial Regions
App 20210183856 - Cheng; Kangguo ;   et al.
2021-06-17
Methods Of Performing Fin Cut Etch Processes For Finfet Semiconductor Devices
App 20210183709 - Zhuang; Lei L. ;   et al.
2021-06-17
Method and structure of improving contact resistance for passive and long channel devices
Grant 11,038,055 - Ok , et al. June 15, 2
2021-06-15
Minimize middle-of-line contact line shorts
Grant 11,011,429 - Ok , et al. May 18, 2
2021-05-18
Middle of the line contact formation
Grant 11,004,750 - Xie , et al. May 11, 2
2021-05-11
Nanosheet bottom isolation and source or drain epitaxial growth
Grant 10,998,234 - Xie , et al. May 4, 2
2021-05-04
Trench silicide contacts with high selectivity process
Grant 10,985,260 - Greene , et al. April 20, 2
2021-04-20
Interconnect structure having fully aligned vias
Grant 10,978,343 - Park , et al. April 13, 2
2021-04-13
Middle Of The Line Contact Formation
App 20210082770 - Xie; Ruilong ;   et al.
2021-03-18
Structure and method to form bi-layer composite phase-change-memory cell
Grant 10,937,961 - Ok , et al. March 2, 2
2021-03-02
Semiconductor structures including middle-of-line (MOL) capacitance reduction for self-aligned contact in gate stack
Grant 10,937,861 - Ok , et al. March 2, 2
2021-03-02
Interconnect Structure Having Fully Aligned Vias
App 20210050260 - Park; Chanro ;   et al.
2021-02-18
Minimizing shorting between FinFET epitaxial regions
Grant 10,923,471 - Cheng , et al. February 16, 2
2021-02-16
Methods of performing fin cut etch processes for FinFET semiconductor devices
Grant 10,916,478 - Zhuang , et al. February 9, 2
2021-02-09
Self-aligned contact for vertical field effect transistor
Grant 10,896,972 - Anderson , et al. January 19, 2
2021-01-19
Minimize Middle-of-line Contact Line Shorts
App 20200402860 - Ok; Injo ;   et al.
2020-12-24
Phase Change Memory Using Multiple Phase Change Layers And Multiple Heat Conductors
App 20200395537 - Ok; Injo ;   et al.
2020-12-17
Nanosheet Bottom Isolation And Source Or Drain Epitaxial Growth
App 20200365687 - Xie; Ruilong ;   et al.
2020-11-19
Approach to bottom dielectric isolation for vertical transport fin field effect transistors
Grant 10,840,354 - Bi , et al. November 17, 2
2020-11-17
3d Phase Change Memory
App 20200357994 - Wang; Wei ;   et al.
2020-11-12
3D phase change memory
Grant 10,833,269 - Wang , et al. November 10, 2
2020-11-10
Replacement contact formation for gate contact over active region with selective metal growth
Grant 10,832,964 - Xie , et al. November 10, 2
2020-11-10
Stress modulation of nFET and pFET fin structures
Grant 10,832,973 - Zhou , et al. November 10, 2
2020-11-10
Structure and method to form phase change memory cell with self- align top electrode contact
Grant 10,833,267 - Ok , et al. November 10, 2
2020-11-10
Trench silicide contacts with high selectivity process
Grant 10,818,773 - Greene , et al. October 27, 2
2020-10-27
Minimize middle-of-line contact line shorts
Grant 10,804,159 - Ok , et al. October 13, 2
2020-10-13
Self-aligned high density and size adjustable phase change memory
Grant 10,803,933 - Ok , et al. October 13, 2
2020-10-13
Trench silicide contacts with high selectivity process
Grant 10,797,154 - Greene , et al. October 6, 2
2020-10-06
Spacer for trench epitaxial structures
Grant 10,790,284 - Ok , et al. September 29, 2
2020-09-29
Middle-of-line (MOL) capacitance reduction for self-aligned contact in gate stack
Grant 10,763,326 - Ok , et al. Sep
2020-09-01
Stress Modulation Of Nfet And Pfet Fin Structures
App 20200266111 - Zhou; Huimei ;   et al.
2020-08-20
Spacer for trench epitaxial structures
Grant 10,741,559 - Ok , et al. A
2020-08-11
Middle of the line subtractive self-aligned contacts
Grant 10,714,393 - Rubin , et al.
2020-07-14
Fin Cut to Prevent Replacement Gate Collapse on STI
App 20200219874 - Greene; Andrew M. ;   et al.
2020-07-09
Method to recess cobalt for gate metal application
Grant 10,707,132 - Jacobi , et al.
2020-07-07
Approach To Bottom Dielectric Isolation For Vertical Transport Fin Field Effect Transistors
App 20200212202 - Bi; Zhenxing ;   et al.
2020-07-02
Self-aligned low dielectric constant gate cap and a method of forming the same
Grant 10,699,951 - Pranatharthiharan , et al.
2020-06-30
Stress modulation of nFET and pFET fin structures
Grant 10,665,512 - Zhou , et al.
2020-05-26
Structure And Method To Form Bi-layer Composite Phase-change-memory Cell
App 20200144501 - Ok; Injo ;   et al.
2020-05-07
Surface area and Schottky barrier height engineering for contact trench epitaxy
Grant 10,643,893 - Fronheiser , et al.
2020-05-05
Surface area and Schottky barrier height engineering for contact trench epitaxy
Grant 10,643,894 - Fronheiser , et al.
2020-05-05
Structure and Method to Form Phase Change Memory Cell with Self-Align Top Electrode Contact
App 20200136043 - OK; Injo ;   et al.
2020-04-30
Stress Modulation Of Nfet And Pfet Fin Structures
App 20200126867 - Zhou; Huimei ;   et al.
2020-04-23
Approach to bottom dielectric isolation for vertical transport fin field effect transistors
Grant 10,629,702 - Bi , et al.
2020-04-21
Contact resistance reduction for advanced technology nodes
Grant 10,629,721 - Ok , et al.
2020-04-21
Self-aligned contact for vertical field effect transistor
Grant 10,622,458 - Anderson , et al.
2020-04-14
Fin cut to prevent replacement gate collapse on STI
Grant 10,622,352 - Greene , et al.
2020-04-14
Semiconductor devices with sidewall spacers of equal thickness
Grant 10,622,259 - Cheng , et al.
2020-04-14
Patterning method for nanosheet transistors
Grant 10,615,257 - Ok , et al.
2020-04-07
Method to recess cobalt for gate metal application
Grant 10,615,078 - Jacobi , et al.
2020-04-07
Patterning Method For Nanosheet Transistors
App 20200083326 - Ok; Injo ;   et al.
2020-03-12
Semiconductor devices with sidewall spacers of equal thickness
Grant 10,580,704 - Cheng , et al.
2020-03-03
Contact-first Field-effect Transistors
App 20200066871 - Hook; Terence P. ;   et al.
2020-02-27
Self-Aligned High Density and Size Adjustable Phase Change Memory
App 20200066337 - OK; Injo ;   et al.
2020-02-27
Self-aligned Contact For Vertical Field Effect Transistor
App 20200052096 - Anderson; Brent A. ;   et al.
2020-02-13
Minimize Middle-of-line Contact Line Shorts
App 20200051866 - Ok; Injo ;   et al.
2020-02-13
Nanosheet isolation for bulk CMOS non-planar devices
Grant 10,559,654 - Pranatharthiharan , et al. Feb
2020-02-11
Method to recess cobalt for gate metal application
Grant 10,546,785 - Jacobi , et al. Ja
2020-01-28
Confined Phase Change Memory With Double Air Gap
App 20200028078 - Ok; Injo ;   et al.
2020-01-23
FinFETs with various fin height
Grant 10,541,253 - Cheng , et al. Ja
2020-01-21
Semiconductor Devices With Sidewall Spacers Of Equal Thickness
App 20200020598 - CHENG; Kangguo ;   et al.
2020-01-16
Semiconductor Devices With Sidewall Spacers Of Equal Thickness
App 20200013682 - CHENG; Kangguo ;   et al.
2020-01-09
Method To Recess Cobalt For Gate Metal Application
App 20190385912 - Jacobi; Georges ;   et al.
2019-12-19
Method To Recess Cobalt For Gate Metal Application
App 20190385913 - Jacobi; Georges ;   et al.
2019-12-19
Confined phase change memory with double air gap
Grant 10,505,111 - Ok , et al. Dec
2019-12-10
Minimize middle-of-line contact line shorts
Grant 10,490,454 - Ok , et al. Nov
2019-11-26
Method And Structure Of Improving Contact Resistance For Passive And Long Channel Devices
App 20190305132 - Ok; Injo ;   et al.
2019-10-03
Method of forming integrated circuit with gate-all-around field effect transistor and the resulting structure
Grant 10,431,663 - Xie , et al. O
2019-10-01
Spacer For Trench Epitaxial Structures
App 20190296015 - OK; Injo ;   et al.
2019-09-26
Spacer For Trench Epitaxial Structures
App 20190279983 - OK; Injo ;   et al.
2019-09-12
Dual liner silicide
Grant 10,395,995 - Pranatharthiharan , et al. A
2019-08-27
Method and structure of improving contact resistance for passive and long channel devices
Grant 10,396,200 - Ok , et al. A
2019-08-27
Methods Of Performing Fin Cut Etch Processes For Finfet Semiconductor Devices
App 20190259670 - Zhuang; Lei L. ;   et al.
2019-08-22
Semiconductor Structures Including Middle-of-line (mol) Capacitance Reduction For Self-aligned Contact In Gate Stack
App 20190259831 - Ok; Injo ;   et al.
2019-08-22
Fin type field effect transistors with different pitches and substantially uniform fin reveal
Grant 10,388,571 - Bi , et al. A
2019-08-20
Middle of the line subtractive self-aligned contacts
Grant 10,373,874 - Rubin , et al.
2019-08-06
FET trench dipole formation
Grant 10,361,203 - Ok , et al.
2019-07-23
Semiconductor structures including middle-of-line (MOL) capacitance reduction for self-aligned contact in gate stack
Grant 10,355,080 - Ok , et al. July 16, 2
2019-07-16
Method Of Forming Integrated Circuit With Gate-all-around Field Effect Transistor And The Resulting Structure
App 20190214473 - Xie; Ruilong ;   et al.
2019-07-11
Forming spacer for trench epitaxial structures
Grant 10,347,632 - Ok , et al. July 9, 2
2019-07-09
Spacer for trench epitaxial structures
Grant 10,347,633 - Ok , et al. July 9, 2
2019-07-09
Minimizing Shorting Between Finfet Epitaxial Regions
App 20190206865 - Cheng; Kangguo ;   et al.
2019-07-04
Source and drain epitaxial semiconductor material integration for high voltage semiconductor devices
Grant 10,340,189 - Pranatharthiharan , et al.
2019-07-02
Self-aligned local interconnect technology
Grant 10,325,848 - Greene , et al.
2019-06-18
Source and drain epitaxial semiconductor material integration for high voltage semiconductor devices
Grant 10,304,741 - Pranatharthiharan , et al.
2019-05-28
Dual liner silicide
Grant 10,304,747 - Pranatharthiharan , et al.
2019-05-28
Middle-of-line (mol) Capacitance Reduction For Self-aligned Contact In Gate Stack
App 20190157388 - Ok; Injo ;   et al.
2019-05-23
HDP fill with reduced void formation and spacer damage
Grant 10,297,506 - Bu , et al.
2019-05-21
Contact Resistance Reduction For Advanced Technology Nodes
App 20190148535 - Ok; Injo ;   et al.
2019-05-16
Minimizing shorting between FinFET epitaxial regions
Grant 10,276,569 - Cheng , et al.
2019-04-30
Spacer formation preventing gate bending
Grant 10,256,239 - Pranatharthiharan , et al.
2019-04-09
Middle-of-line (MOL) capacitance reduction for self-aligned contact in gate stack
Grant 10,256,296 - Ok , et al. April 9, 2
2019-04-09
Semiconductor structure containing low-resistance source and drain contacts
Grant 10,249,624 - Ok , et al.
2019-04-02
Source and drain epitaxial semiconductor material integration for high voltage semiconductor devices
Grant 10,236,212 - Pranatharthiharan , et al.
2019-03-19
Self-aligned local interconnect technology
Grant 10,236,253 - Greene , et al.
2019-03-19
Self-aligned low dielectric constant gate cap and a method of forming the same
Grant 10,229,852 - Pranatharthiharan , et al.
2019-03-12
Finfets With Various Fin Height
App 20190035816 - Cheng; Kangguo ;   et al.
2019-01-31
Forming Self-Aligned Contact with Spacer First
App 20190027580 - Fan; Su Chen ;   et al.
2019-01-24
Forming self-aligned contact with spacer first
Grant 10,186,599 - Fan , et al. Ja
2019-01-22
Self-aligned Local Interconnect Technology
App 20190013268 - Greene; Andrew M. ;   et al.
2019-01-10
Strained CMOS on strain relaxation buffer substrate
Grant 10,170,498 - Cheng , et al. J
2019-01-01
Structure to prevent lateral epitaxial growth in semiconductor devices
Grant 10,170,482 - Pranatharthiharan , et al. J
2019-01-01
Strained CMOS on strain relaxation buffer substrate
Grant 10,141,338 - Cheng , et al. Nov
2018-11-27
Self-aligned Contact For Vertical Field Effect Transistor
App 20180337256 - Anderson; Brent A. ;   et al.
2018-11-22
FinFETs with various fin height
Grant 10,134,760 - Cheng , et al. November 20, 2
2018-11-20
Devices and methods of cobalt fill metallization
Grant 10,128,151 - Kamineni , et al. November 13, 2
2018-11-13
Hdp Fill With Reduced Void Formation And Spacer Damage
App 20180323110 - Bu; Huiming ;   et al.
2018-11-08
Minimize Middle-of-line Contact Line Shorts
App 20180323109 - OK; Injo ;   et al.
2018-11-08
Self-aligned source/drain contacts
Grant 10,121,789 - Adusumilli , et al. November 6, 2
2018-11-06
Etch-resistant spacer formation on gate structure
Grant 10,109,722 - Xie , et al. October 23, 2
2018-10-23
Method And Structure Of Improving Contact Resistance For Passive And Long Channel Devices
App 20180294356 - Ok; Injo ;   et al.
2018-10-11
Source and drain epitaxial semiconductor material integration for high voltage semiconductor devices
Grant 10,090,202 - Pranatharthiharan , et al. October 2, 2
2018-10-02
HDP fill with reduced void formation and spacer damage
Grant 10,083,861 - Bu , et al. September 25, 2
2018-09-25
Fin Type Field Effect Transistors With Different Pitches And Substantially Uniform Fin Reveal
App 20180269108 - Bi; Zhenxing ;   et al.
2018-09-20
Middle Of The Line Subtractive Self-aligned Contacts
App 20180261511 - Rubin; Joshua M. ;   et al.
2018-09-13
Method To Recess Cobalt For Gate Metal Application
App 20180261507 - Jacobi; Georges ;   et al.
2018-09-13
Minimize middle-of-line contact line shorts
Grant 10,074,569 - Ok , et al. September 11, 2
2018-09-11
Spacer For Trench Epitaxial Structures
App 20180254274 - OK; Injo ;   et al.
2018-09-06
Etch-resistant Spacer Formation On Gate Structure
App 20180254331 - Xie; Ruilong ;   et al.
2018-09-06
Spacer For Trench Epitaxial Structures
App 20180254275 - OK; Injo ;   et al.
2018-09-06
Dual Liner Silicide
App 20180233417 - Pranatharthiharan; Balasubramanian ;   et al.
2018-08-16
Approach To Bottom Dielectric Isolation For Vertical Transport Fin Field Effect Transistors
App 20180226491 - Bi; Zhenxing ;   et al.
2018-08-09
Approach To Bottom Dielectric Isolation For Vertical Transport Fin Field Effect Transistors
App 20180226489 - Bi; Zhenxing ;   et al.
2018-08-09
Method and structure of improving contact resistance for passive and long channel devices
Grant 10,043,904 - Ok , et al. August 7, 2
2018-08-07
Fin Cut to Prevent Replacement Gate Collapse on STI
App 20180211955 - Greene; Andrew M. ;   et al.
2018-07-26
Middle of the line subtractive self-aligned contacts
Grant 10,032,674 - Rubin , et al. July 24, 2
2018-07-24
Minimizing Shorting Between Finfet Epitaxial Regions
App 20180204837 - Cheng; Kangguo ;   et al.
2018-07-19
Finfets With Various Fin Height
App 20180197886 - Cheng; Kangguo ;   et al.
2018-07-12
Spacer for trench epitaxial structures
Grant 10,020,306 - Ok , et al. July 10, 2
2018-07-10
Fin type field effect transistors with different pitches and substantially uniform fin reveal
Grant 10,020,229 - Bi , et al. July 10, 2
2018-07-10
Self heating reduction for analog radio frequency (RF) device
Grant 10,014,220 - Ok , et al. July 3, 2
2018-07-03
Self heating reduction for analog radio frequency (RF) device
Grant 10,014,295 - Ok , et al. July 3, 2
2018-07-03
Devices And Methods Of Cobalt Fill Metallization
App 20180174965 - KAMINENI; Vimal ;   et al.
2018-06-21
HDP fill with reduced void formation and spacer damage
Grant 10,002,792 - Bu , et al. June 19, 2
2018-06-19
Confined eptaxial growth for continued pitch scaling
Grant 9,997,419 - Kanakasabapathy , et al. June 12, 2
2018-06-12
Dual liner silicide
Grant 9,997,418 - Pranatharthiharan , et al. June 12, 2
2018-06-12
Minimizing shorting between FinFET epitaxial regions
Grant 9,985,024 - Cheng , et al. May 29, 2
2018-05-29
Dual Liner Silicide
App 20180122711 - Pranatharthiharan; Balasubramanian ;   et al.
2018-05-03
Effective device formation for advanced technology nodes with aggressive fin-pitch scaling
Grant 9,953,976 - Ok , et al. April 24, 2
2018-04-24
Spacer Formation Preventing Gate Bending
App 20180108660 - Pranatharthiharan; Balasubramanian ;   et al.
2018-04-19
Trench Silicide Contacts With High Selectivity Process
App 20180108749 - Greene; Andrew M. ;   et al.
2018-04-19
HDP fill with reduced void formation and spacer damage
Grant 9,935,003 - Bu , et al. April 3, 2
2018-04-03
Gate contact with vertical isolation from source-drain
Grant 9,935,168 - Horak , et al. April 3, 2
2018-04-03
Semiconductor Devices With Sidewall Spacers Of Equal Thickness
App 20180090390 - CHENG; Kangguo ;   et al.
2018-03-29
Nanosheet Isolation For Bulk Cmos Non-planar Devices
App 20180090566 - Pranatharthiharan; Balasubramanian ;   et al.
2018-03-29
Self-aligned Low Dielectric Constant Gate Cap And A Method Of Forming The Same
App 20180090375 - Pranatharthiharan; Balasubramanian ;   et al.
2018-03-29
Dual liner silicide
Grant 9,929,059 - Pranatharthiharan , et al. March 27, 2
2018-03-27
HDP fill with reduced void formation and spacer damage
Grant 9,929,057 - Bu , et al. March 27, 2
2018-03-27
Self-aligned Low Dielectric Constant Gate Cap And A Method Of Forming The Same
App 20180082895 - Pranatharthiharan; Balasubramanian ;   et al.
2018-03-22
Trench silicide contacts with high selectivity process
Grant 9,923,078 - Greene , et al. March 20, 2
2018-03-20
Semiconductor Devices With Sidewall Spacers Of Equal Thickness
App 20180069007 - CHENG; Kangguo ;   et al.
2018-03-08
Strained Cmos On Strain Relaxation Buffer Substrate
App 20180069026 - Cheng; Kangguo ;   et al.
2018-03-08
Strained Cmos On Strain Relaxation Buffer Substrate
App 20180069118 - Cheng; Kangguo ;   et al.
2018-03-08
Semiconductor devices with sidewall spacers of equal thickness
Grant 9,905,479 - Cheng , et al. February 27, 2
2018-02-27
Improving channel strain and controlling lateral epitaxial growth of the source and drain in FinFET devices
Grant 9,905,421 - Ok , et al. February 27, 2
2018-02-27
Self-aligned low dielectric constant gate cap and a method of forming the same
Grant 9,905,463 - Pranatharthiharan , et al. February 27, 2
2018-02-27
Method And Structure Of Improving Contact Resistance For Passive And Long Channel Devices
App 20180053851 - Ok; Injo ;   et al.
2018-02-22
Integrated circuit (IC) with offset gate sidewall contacts and method of manufacture
Grant 9,893,085 - Ok , et al. February 13, 2
2018-02-13
Method and structure of improving contact resistance for passive and long channel devices
Grant 9,887,289 - Ok , et al. February 6, 2
2018-02-06
Semiconductor devices with sidewall spacers of equal thickness
Grant 9,887,198 - Cheng , et al. February 6, 2
2018-02-06
Strained CMOS on strain relaxation buffer substrate
Grant 9,882,050 - Cheng , et al. January 30, 2
2018-01-30
Nanosheet isolation for bulk CMOS non-planar devices
Grant 9,871,099 - Pranatharthiharan , et al. January 16, 2
2018-01-16
Semiconductor Structure Containing Low-resistance Source And Drain Contacts
App 20180012892 - Ok; Injo ;   et al.
2018-01-11
Surface Area And Schottky Barrier Height Engineering For Contact Trench Epitaxy
App 20180006140 - Fronheiser; Jody ;   et al.
2018-01-04
Surface Area And Schottky Barrier Height Engineering For Contact Trench Epitaxy
App 20180006141 - Fronheiser; Jody ;   et al.
2018-01-04
Minimizing shorting between FinFET epitaxial regions
Grant 9,852,951 - Cheng , et al. December 26, 2
2017-12-26
Strained CMOS on strain relaxation buffer substrate
Grant 9,853,056 - Cheng , et al. December 26, 2
2017-12-26
Source And Drain Epitaxial Semiconductor Material Integration For High Voltage Semiconductor Devices
App 20170365521 - Pranatharthiharan; Balasubramanian ;   et al.
2017-12-21
Source And Drain Epitaxial Semiconductor Material Integration For High Voltage Semiconductor Devices
App 20170365682 - Pranatharthiharan; Balasubramanian ;   et al.
2017-12-21
Method to prevent lateral epitaxial growth in semiconductor devices
Grant 9,825,044 - Pranatharthiharan , et al. November 21, 2
2017-11-21
Fet Trench Dipole Formation
App 20170330802 - Ok; Injo ;   et al.
2017-11-16
Forming stressed epitaxial layers between gates separated by different pitches
Grant 9,818,873 - Alptekin , et al. November 14, 2
2017-11-14
Minimize Middle-of-line Contact Line Shorts
App 20170323833 - Ok; Injo ;   et al.
2017-11-09
Method to prevent lateral epitaxial growth in semiconductor devices
Grant 9,812,368 - Pranatharthiharan , et al. November 7, 2
2017-11-07
FinFET spacer formation on gate sidewalls, between the channel and source/drain regions
Grant 9,806,078 - Xie , et al. October 31, 2
2017-10-31
FET trench dipole formation
Grant 9,799,654 - Ok , et al. October 24, 2
2017-10-24
Fin field effect transistor device with reduced overlap capacitance and enhanced mechanical stability
Grant 9,793,378 - Loubet , et al. October 17, 2
2017-10-17
Hdp Fill With Reduced Void Formation And Spacer Damage
App 20170287776 - Bu; Huiming ;   et al.
2017-10-05
Hdp Fill With Reduced Void Formation And Spacer Damage
App 20170287785 - Bu; Huiming ;   et al.
2017-10-05
Semiconductor structure containing low-resistance source and drain contacts
Grant 9,768,173 - Ok , et al. September 19, 2
2017-09-19
Fin Type Field Effect Transistors With Different Pitches And Substantially Uniform Fin Reveal
App 20170263503 - Bi; Zhenxing ;   et al.
2017-09-14
Structure to prevent lateral epitaxial growth in semiconductor devices
Grant 9,741,715 - Pranatharthiharan , et al. August 22, 2
2017-08-22
Integrated Circuit (ic) With Offset Gate Sidewall Contacts And Method Of Manufacture
App 20170229479 - Ok; Injo ;   et al.
2017-08-10
Minimizing Shorting Between Finfet Epitaxial Regions
App 20170229455 - Cheng; Kangguo ;   et al.
2017-08-10
Self-aligned Local Interconnect Technology
App 20170221808 - Greene; Andrew M. ;   et al.
2017-08-03
HDP fill with reduced void formation and spacer damage
Grant 9,721,834 - Bu , et al. August 1, 2
2017-08-01
Integrated circuit (IC) with offset gate sidewall contacts and method of manufacture
Grant 9,704,760 - Ok , et al. July 11, 2
2017-07-11
Minimizing shorting between FinFET epitaxial regions
Grant 9,704,753 - Cheng , et al. July 11, 2
2017-07-11
Self-aligned local interconnect technology
Grant 9,698,101 - Greene , et al. July 4, 2
2017-07-04
Fin type field effect transistors with different pitches and substantially uniform fin reveal
Grant 9,691,765 - Bi , et al. June 27, 2
2017-06-27
Confined Eptaxial Growth For Continued Pitch Scaling
App 20170178976 - Kanakasabapathy; Sivananda K. ;   et al.
2017-06-22
Stable contact on one-sided gate tie-down structure
Grant 9,685,340 - Ok , et al. June 20, 2
2017-06-20
Devices and methods of forming epi for aggressive gate pitch
Grant 9,685,384 - Xie , et al. June 20, 2
2017-06-20
Replacement metal gate dielectric cap
Grant 9,685,530 - Farmer , et al. June 20, 2
2017-06-20
Gate Contact With Vertical Isolation From Source-drain
App 20170170266 - Horak; David V. ;   et al.
2017-06-15
Self-aligned Low Dielectric Constant Gate Cap And A Method Of Forming The Same
App 20170170068 - Pranatharthiharan; Balasubramanian ;   et al.
2017-06-15
Method And Structure Of Improving Contact Resistance For Passive And Long Channel Devices
App 20170170315 - Ok; Injo ;   et al.
2017-06-15
Method To Prevent Lateral Epitaxial Growth In Semiconductor Devices
App 20170162584 - Pranatharthiharan; Balasubramanian ;   et al.
2017-06-08
Method And Structure To Prevent Lateral Epitaxial Growth In Semiconductor Devices
App 20170162582 - Pranatharthiharan; Balasubramanian ;   et al.
2017-06-08
Contact Resistance Reduction For Advanced Technology Nodes
App 20170162444 - Ok; Injo ;   et al.
2017-06-08
Method To Prevent Lateral Epitaxial Growth In Semiconductor Devices
App 20170162451 - Pranatharthiharan; Balasubramanian ;   et al.
2017-06-08
Structure To Prevent Lateral Epitaxial Growth In Semiconductor Devices
App 20170162565 - Pranatharthiharan; Balasubramanian ;   et al.
2017-06-08
Middle Of The Line Subtractive Self-aligned Contacts
App 20170162437 - Rubin; Joshua M. ;   et al.
2017-06-08
Self Heating Reduction For Analog Radio Frequency (rf) Device
App 20170162567 - Ok; Injo ;   et al.
2017-06-08
Middle Of The Line Subtractive Self-aligned Contacts
App 20170162443 - Rubin; Joshua M. ;   et al.
2017-06-08
Self Heating Reduction For Analog Radio Frequency (rf) Device
App 20170162445 - Ok; Injo ;   et al.
2017-06-08
ESD device compatible with bulk bias capability
Grant 9,673,190 - Cheng , et al. June 6, 2
2017-06-06
Minimize middle-of-line contact line shorts
Grant 9,673,101 - Ok , et al. June 6, 2
2017-06-06
Improving Channel Strain And Controlling Lateral Epitaxial Growth Of The Source And Drain In Finfet Devices
App 20170154774 - Ok; Injo ;   et al.
2017-06-01
Effective Device Formation For Advanced Technology Nodes With Aggressive Fin-pitch Scaling
App 20170148789 - Ok; Injo ;   et al.
2017-05-25
Middle-of-line (mol) Capacitance Reduction For Self-aligned Contact In Gate Stack
App 20170148874 - Ok; Injo ;   et al.
2017-05-25
Semiconductor Structures Including Middle-of-line (mol) Capacitance Reduction For Self-aligned Contact In Gate Stack
App 20170148662 - Ok; Injo ;   et al.
2017-05-25
Hdp Fill With Reduced Void Formation And Spacer Damage
App 20170148668 - Bu; Huiming ;   et al.
2017-05-25
Nanosheet Isolation For Bulk Cmos Non-planar Devices
App 20170133459 - Pranatharthiharan; Balasubramanian ;   et al.
2017-05-11
Method to prevent lateral epitaxial growth in semiconductor devices by performing plasma nitridation process on Fin ends
Grant 9,646,885 - Pranatharthiharan , et al. May 9, 2
2017-05-09
Source And Drain Epitaxial Semiconductor Material Integration For High Voltage Semiconductor Devices
App 20170125299 - Pranatharthiharan; Balasubramanian ;   et al.
2017-05-04
Trench Silicide Contacts With High Selectivity Process
App 20170125543 - Greene; Andrew M. ;   et al.
2017-05-04
Source And Drain Epitaxial Semiconductor Material Integration For High Voltage Semiconductor Devices
App 20170125541 - Pranatharthiharan; Balasubramanian ;   et al.
2017-05-04
Trench Silicide Contacts With High Selectivity Process
App 20170125292 - Greene; Andrew M. ;   et al.
2017-05-04
Trench Silicide Contacts With High Selectivity Process
App 20170125414 - Greene; Andrew M. ;   et al.
2017-05-04
Self-aligned Source/drain Contacts
App 20170117279 - Adusumilli; Praneet ;   et al.
2017-04-27
Semiconductor Devices With Sidewall Spacers Of Equal Thickness
App 20170117193 - CHENG; Kangguo ;   et al.
2017-04-27
Spacer For Trench Epitaxial Structures
App 20170103984 - Ok; Injo ;   et al.
2017-04-13
Forming Stressed Epitaxial Layer Using Dummy Gates
App 20170104100 - Alptekin; Emre ;   et al.
2017-04-13
Replacement metal gate dielectric cap
Grant 9,620,622 - Farmer , et al. April 11, 2
2017-04-11
Esd Device Compatible With Bulk Bias Capability
App 20170098646 - Cheng; Kangguo ;   et al.
2017-04-06
Gate contact with vertical isolation from source-drain
Grant 9,614,047 - Horak , et al. April 4, 2
2017-04-04
Minimize Middle-of-line Contact Line Shorts
App 20170092543 - Ok; Injo ;   et al.
2017-03-30
Dual Liner Silicide
App 20170084500 - Pranatharthiharan; Balasubramanian ;   et al.
2017-03-23
Hdp Fill With Reduced Void Formation And Spacer Damage
App 20170076987 - Bu; Huiming ;   et al.
2017-03-16
Forming dual contact silicide using metal multi-layer and ion beam mixing
Grant 9,595,592 - Ok , et al. March 14, 2
2017-03-14
Undercut insulating regions for silicon-on-insulator device
Grant 9,595,578 - Cheng , et al. March 14, 2
2017-03-14
Method to prevent lateral epitaxial growth in semiconductor devices
Grant 9,590,074 - Pranatharthiharan , et al. March 7, 2
2017-03-07
Self-aligned Local Interconnect Technology
App 20170062325 - Greene; Andrew M. ;   et al.
2017-03-02
Solid state diffusion doping for bulk finFET devices
Grant 9,583,489 - Anderson , et al. February 28, 2
2017-02-28
Semiconductor devices with sidewall spacers of equal thickness
Grant 9,576,961 - Cheng , et al. February 21, 2
2017-02-21
Self-aligned source/drain contacts
Grant 9,576,957 - Adusumilli , et al. February 21, 2
2017-02-21
Source and drain epitaxial semiconductor material integration for high voltage semiconductor devices
Grant 9,570,555 - Pranatharthiharan , et al. February 14, 2
2017-02-14
Effective device formation for advanced technology nodes with aggressive fin-pitch scaling
Grant 9,564,370 - Ok , et al. February 7, 2
2017-02-07
Dual liner silicide
Grant 9,564,372 - Pranatharthiharan , et al. February 7, 2
2017-02-07
HDP fill with reduced void formation and spacer damage
Grant 9,558,995 - Bu , et al. January 31, 2
2017-01-31
Semiconductor Devices With Sidewall Spacers Of Equal Thickness
App 20170011970 - CHENG; Kangguo ;   et al.
2017-01-12
Undercut Insulating Regions For Silicon-on-insulator Device
App 20170005167 - Cheng; Kangguo ;   et al.
2017-01-05
Parasitic capacitance reduction
Grant 9,536,988 - Pranatharthiharan , et al. January 3, 2
2017-01-03
Stable Contact On One-sided Gate Tie-down Structure
App 20160379925 - Ok; Injo ;   et al.
2016-12-29
Hdp Fill With Reduced Void Formation And Spacer Damage
App 20160379873 - Bu; Huiming ;   et al.
2016-12-29
Hdp Fill With Reduced Void Formation And Spacer Damage
App 20160380078 - Bu; Huiming ;   et al.
2016-12-29
Integrated Circuit (ic) With Offset Gate Sidewall Contacts And Method Of Manufacture
App 20160379893 - Ok; Injo ;   et al.
2016-12-29
Parasitic capacitance reduction
Grant 9,530,890 - Pranatharthiharan , et al. December 27, 2
2016-12-27
Dual Liner Silicide
App 20160372332 - Pranatharthiharan; Balasubramanian ;   et al.
2016-12-22
Fet Trench Dipole Formation
App 20160372470 - Ok; Injo ;   et al.
2016-12-22
Contact-first Field-effect Transistors
App 20160372600 - Hook; Terence B. ;   et al.
2016-12-22
Dual Liner Silicide
App 20160372380 - Pranatharthiharan; Balasubramanian ;   et al.
2016-12-22
Self heating reduction for analog radio frequency (RF) device
Grant 9,520,500 - Ok , et al. December 13, 2
2016-12-13
Minimizing Shorting Between Finfet Epitaxial Regions
App 20160358824 - Cheng; Kangguo ;   et al.
2016-12-08
Self-aligned Source/drain Contacts
App 20160358916 - Adusumilli; Praneet ;   et al.
2016-12-08
Methods of forming FinFET semiconductor devices with self-aligned contact elements using a replacement gate process and the resulting devices
Grant 9,515,163 - Xie , et al. December 6, 2
2016-12-06
Low resistance replacement metal gate structure
Grant 9,508,816 - Ok , et al. November 29, 2
2016-11-29
Semiconductor devices with sidewall spacers of equal thickness
Grant 9,502,418 - Cheng , et al. November 22, 2
2016-11-22
Semiconductor Structure Containing Low-resistance Source And Drain Contacts
App 20160336323 - Ok; Injo ;   et al.
2016-11-17
Method to prevent lateral epitaxial growth in semiconductor devices by performing nitridation process on exposed Fin ends
Grant 9,496,133 - Pranatharthiharan , et al. November 15, 2
2016-11-15
Capacitance reduction for advanced technology nodes
Grant 9,484,401 - Ok , et al. November 1, 2
2016-11-01
Minimizing Shorting Between Finfet Epitaxial Regions
App 20160315144 - CHENG; KANGGUO ;   et al.
2016-10-27
Replacement Metal Gate Dielectric Cap
App 20160308026 - Farmer; Damon B. ;   et al.
2016-10-20
Confined eptaxial growth for continued pitch scaling
Grant 9,472,447 - Kanakasabapathy , et al. October 18, 2
2016-10-18
Undercut insulating regions for silicon-on-insulator device
Grant 9,472,616 - Cheng , et al. October 18, 2
2016-10-18
Replacement Metal Gate Dielectric Cap
App 20160293731 - Farmer; Damon B. ;   et al.
2016-10-06
Channel strain and controlling lateral epitaxial growth of the source and drain in FinFET devices
Grant 9,461,168 - Ok , et al. October 4, 2
2016-10-04
Minimizing shorting between FinFET epitaxial regions
Grant 9,443,853 - Cheng , et al. September 13, 2
2016-09-13
Integrated circuits with middle of line capacitance reduction in self-aligned contact process flow and fabrication methods
Grant 9,443,944 - Zang , et al. September 13, 2
2016-09-13
Integrated circuits with middle of line capacitance reduction in self-aligned contact process flow and fabrication methods
Grant 9,443,738 - Zang , et al. September 13, 2
2016-09-13
Gate Contact With Vertical Isolation From Source-drain
App 20160260812 - Horak; David V. ;   et al.
2016-09-08
Method for the formation of fin structures for FinFET devices
Grant 9,437,504 - Loubet , et al. September 6, 2
2016-09-06
Method for forming merged contact for semiconductor device
Grant 9,431,399 - Alptekin , et al. August 30, 2
2016-08-30
Channel strain and controlling lateral epitaxial growth of the source and drain in FinFET devices
Grant 9,431,486 - Ok , et al. August 30, 2
2016-08-30
Method to prevent lateral epitaxial growth in semiconductor devices
Grant 9,425,108 - Pranatharthiharan , et al. August 23, 2
2016-08-23
Forming isolated fins from a substrate
Grant 9,418,902 - Cheng , et al. August 16, 2
2016-08-16
Replacement metal gate dielectric cap
Grant 9,419,097 - Farmer , et al. August 16, 2
2016-08-16
Integrated Circuits With Middle Of Line Capacitance Reduction In Self-aligned Contact Process Flow And Fabrication Methods
App 20160233091 - ZANG; Hui ;   et al.
2016-08-11
Semiconductor structure containing low-resistance source and drain contacts
Grant 9,406,568 - Ok , et al. August 2, 2
2016-08-02
Low Resistance Replacement Metal Gate Structure
App 20160163809 - Ok; Injo ;   et al.
2016-06-09
Replacement Metal Gate Dielectric Cap
App 20160149016 - Farmer; Damon B. ;   et al.
2016-05-26
Semiconductor Structure Containing Low-resistance Source And Drain Contacts
App 20160148846 - Ok; Injo ;   et al.
2016-05-26
Capacitance Reduction For Advanced Technology Nodes
App 20160148999 - Ok; Injo ;   et al.
2016-05-26
Gate contact with vertical isolation from source-drain
Grant 9,349,598 - Horak , et al. May 24, 2
2016-05-24
Integrated Circuits With Middle Of Line Capacitance Reduction In Self-aligned Contact Process Flow And Fabrication Methods
App 20160141379 - ZANG; Hui ;   et al.
2016-05-19
Method of forming contact useful in replacement metal gate processing and related semiconductor structure
Grant 9,337,094 - Pranatharthiharan , et al. May 10, 2
2016-05-10
Structure and method to improve ETSOI MOSFETS with back gate
Grant 9,337,259 - Cheng , et al. May 10, 2
2016-05-10
Semiconductor Devices With Sidewall Spacers Of Equal Thickness
App 20160099322 - CHENG; Kangguo ;   et al.
2016-04-07
Semiconductor Devices With Sidewall Spacers Of Equal Thickness
App 20160099245 - CHENG; Kangguo ;   et al.
2016-04-07
Low resistance replacement metal gate structure
Grant 9,305,923 - Ok , et al. April 5, 2
2016-04-05
Integrated multiple gate length semiconductor device including self-aligned contacts
Grant 9,293,551 - Fan , et al. March 22, 2
2016-03-22
Dual EPI CMOS integration for planar substrates
Grant 9,263,343 - Loubet , et al. February 16, 2
2016-02-16
Methods of forming a semiconductor device with a protected gate cap layer and the resulting device
Grant 9,263,537 - Pham , et al. February 16, 2
2016-02-16
Undercut Insulating Regions For Silicon-on-insulator Device
App 20160013269 - Cheng; Kangguo ;   et al.
2016-01-14
Gate Contact With Vertical Isolation From Source-drain
App 20150357409 - Horak; David V. ;   et al.
2015-12-10
Integrated Multiple Gate Length Semiconductor Device Including Self-aligned Contacts
App 20150349075 - Fan; Su Chen ;   et al.
2015-12-03
Method For The Formation Of Fin Structures For Finfet Devices
App 20150325487 - Loubet; Nicolas ;   et al.
2015-11-12
Gate contact with vertical isolation from source-drain
Grant 9,147,576 - Horak , et al. September 29, 2
2015-09-29
Gate Contact With Vertical Isolation From Source-drain
App 20150206754 - Horak; David V. ;   et al.
2015-07-23
Bi-layer gate cap for self-aligned contact formation
Grant 9,064,801 - Horak , et al. June 23, 2
2015-06-23
Halo Region Formation By Epitaxial Growth
App 20150145033 - Adam; Thomas N. ;   et al.
2015-05-28
Integrated Multiple Gate Length Semiconductor Device Including Self-aligned Contacts
App 20150145057 - Fan; Su Chen ;   et al.
2015-05-28
Substrate Local Interconnect Integration With Finfets
App 20150145041 - Divakaruni; Ramachandra ;   et al.
2015-05-28
Halo region formation by epitaxial growth
Grant 9,034,741 - Adam , et al. May 19, 2
2015-05-19
Forming Isolated Fins From A Substrate
App 20150102409 - Cheng; Kangguo ;   et al.
2015-04-16
Maskless dual silicide contact formation
Grant 8,999,799 - Adusumilli , et al. April 7, 2
2015-04-07
Methods Of Forming Finfet Semiconductor Devices With Self-aligned Contact Elements Using A Replacement Gate Process And The Resulting Devices
App 20150069532 - Xie; Ruilong ;   et al.
2015-03-12
Maskless Dual Silicide Contact Formation
App 20150064863 - Adusumilli; Praneet ;   et al.
2015-03-05
Methods Of Forming A Semiconductor Device With A Protected Gate Cap Layer And The Resulting Device
App 20150041869 - Pham; Daniel ;   et al.
2015-02-12
Contact formation for ultra-scaled devices
Grant 8,937,359 - Xie , et al. January 20, 2
2015-01-20
Patterning Fins And Planar Areas In Silicon
App 20150014772 - Cheng; Kangguo ;   et al.
2015-01-15
Dual Epi Cmos Integration For Planar Substrates
App 20150011060 - Loubet; Nicolas ;   et al.
2015-01-08
Methods of forming a semiconductor device with a protected gate cap layer and the resulting device
Grant 8,906,754 - Pham , et al. December 9, 2
2014-12-09
Fin Field Effect Transistor Device With Reduced Overlap Capacitance And Enhanced Mechanical Stability
App 20140353753 - Loubet; Nicolas ;   et al.
2014-12-04
Method For The Formation Of Fin Structures For Finfet Devices
App 20140353767 - Liu; Qing ;   et al.
2014-12-04
Halo Region Formation By Epitaxial Growth
App 20140353732 - Adam; Thomas N. ;   et al.
2014-12-04
Contact Formation For Ultra-scaled Devices
App 20140339629 - Xie; Ruilong ;   et al.
2014-11-20
Methods of forming a semiconductor device with a protected gate cap layer and the resulting device
Grant 8,871,582 - Pham , et al. October 28, 2
2014-10-28
Methods Of Forming A Semiconductor Device With A Protected Gate Cap Layer And The Resulting Device
App 20140264486 - Pham; Daniel ;   et al.
2014-09-18
Methods Of Forming A Semiconductor Device With A Protected Gate Cap Layer And The Resulting Device
App 20140264487 - Pham; Daniel ;   et al.
2014-09-18
Dual EPI CMOS integration for planar substrates
Grant 8,836,041 - Loubet , et al. September 16, 2
2014-09-16
Finfet Compatible Diode For Esd Protection
App 20140191319 - Cheng; Kangguo ;   et al.
2014-07-10
Methods of forming semiconductor devices with self-aligned contacts and the resulting devices
Grant 8,753,970 - Xie , et al. June 17, 2
2014-06-17
Dual Epi Cmos Integration For Planar Substrates
App 20140138775 - Loubet; Nicolas ;   et al.
2014-05-22
Dielectric Cap Layer For Replacement Gate With Self-aligned Contact
App 20140134836 - PRANATHARTHIHARAN; BALASUBRAMANIAN ;   et al.
2014-05-15
Structure And Method To Improve Etsoi Mosfets With Back Gate
App 20140124862 - Cheng; Kangguo ;   et al.
2014-05-08
Methods Of Forming Semiconductor Devices With Self-aligned Contacts And The Resulting Devices
App 20140070285 - Xie; Ruilong ;   et al.
2014-03-13
Preventing Shorting Of Adjacent Devices
App 20130309837 - CHANG; JOSEPHINE ;   et al.
2013-11-21
Preventing shorting of adjacent devices
Grant 8,586,455 - Chang , et al. November 19, 2
2013-11-19
Method for forming self-aligned metal silicide contacts
Grant 8,039,382 - Fang , et al. October 18, 2
2011-10-18
Method And Composition For Electro-chemical-mechanical Polishing
App 20100051474 - Andricacos; Panayotis C. ;   et al.
2010-03-04
Method For Forming Self-aligned Metal Silicide Contacts
App 20090309228 - Fang; Sunfei ;   et al.
2009-12-17
Method for forming self-aligned metal silicide contacts
Grant 7,618,891 - Fang , et al. November 17, 2
2009-11-17
Multi-layer Mask Method For Patterned Structure Ethcing
App 20080305437 - Fuller; Nicholas C.M. ;   et al.
2008-12-11
Method for forming self-aligned metal silicide contacts
App 20070254479 - Fang; Sunfei ;   et al.
2007-11-01
Method and composition for electro-chemical-mechanical polishing
App 20060163083 - Andricacos; Panayotis C. ;   et al.
2006-07-27

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