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Patent applications and USPTO patent grants for Pradeep; Wilson.The latest application filed is for "delay fault testing of pseudo static controls".
Patent | Date |
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Testing of integrated circuits during at-speed mode of operation Grant 11,333,707 - Agarwal , et al. May 17, 2 | 2022-05-17 |
Delay Fault Testing Of Pseudo Static Controls App 20220091919 - Acharya; Aravinda ;   et al. | 2022-03-24 |
Multiple input signature register analysis for digital circuitry Grant 11,209,481 - Maheshwari , et al. December 28, 2 | 2021-12-28 |
False path timing exception handler circuit Grant 11,194,944 - Pradeep , et al. December 7, 2 | 2021-12-07 |
Delay fault testing of pseudo static controls Grant 11,194,645 - Acharya , et al. December 7, 2 | 2021-12-07 |
Dynamic Generation Of Atpg Mode Signals For Testing Multipath Memory Circuit App 20210318378 - PRADEEP; WILSON ;   et al. | 2021-10-14 |
Phase Controlled Codec Block Scan Of A Partitioned Circuit Device App 20210311121 - NARAYANAN; Prakash ;   et al. | 2021-10-07 |
Path Based Controls For Ate Mode Testing Of Multicell Memory Circuit App 20210278459 - PRADEEP; WILSON ;   et al. | 2021-09-09 |
Phase controlled codec block scan of a partitioned circuit device Grant 11,073,557 - Narayanan , et al. July 27, 2 | 2021-07-27 |
Dynamic generation of ATPG mode signals for testing multipath memory circuit Grant 11,073,553 - Pradeep , et al. July 27, 2 | 2021-07-27 |
Path based controls for ATE mode testing of multicell memory circuit Grant 11,047,910 - Pradeep , et al. June 29, 2 | 2021-06-29 |
False Path Timing Exception Handler Circuit App 20200372197 - PRADEEP; WILSON ;   et al. | 2020-11-26 |
Phase Controlled Codec Block Scan Of A Partitioned Circuit Device App 20200355744 - NARAYANAN; Prakash ;   et al. | 2020-11-12 |
False path timing exception handler circuit Grant 10,776,546 - Pradeep , et al. September 15, 2 | 2020-09-15 |
Delay Fault Testing Of Pseudo Static Controls App 20200142768 - Acharya; Aravinda ;   et al. | 2020-05-07 |
Testing Of Integrated Circuits During At-speed Mode Of Operation App 20200132763 - Agarwal; Khushboo ;   et al. | 2020-04-30 |
Delay fault testing of pseudo static controls Grant 10,579,454 - Acharya , et al. | 2020-03-03 |
Methods and apparatus for test insertion points Grant 10,473,717 - Pradeep Nov | 2019-11-12 |
False Path Timing Exception Handler Circuit App 20190266303 - PRADEEP; WILSON ;   et al. | 2019-08-29 |
Dynamic Generation Of Atpg Mode Signals For Testing Multipath Memory Circuit App 20190206507 - PRADEEP; WILSON ;   et al. | 2019-07-04 |
Path Based Controls For Ate Mode Testing Of Multicell Memory Circuit App 20190204382 - PRADEEP; WILSON ;   et al. | 2019-07-04 |
False path timing exception handler circuit Grant 10,331,826 - Pradeep , et al. | 2019-06-25 |
Multiple Input Signature Register Analysis For Digital Circuitry App 20190113566 - MAHESHWARI; NAMAN ;   et al. | 2019-04-18 |
Multiple input signature register analysis for digital circuitry Grant 10,184,980 - Maheshwari , et al. Ja | 2019-01-22 |
False Path Timing Exception Handler Circuit App 20180307788 - PRADEEP; WILSON ;   et al. | 2018-10-25 |
Delay Fault Testing Of Pseudo Static Controls App 20180307553 - ACHARYA; ARAVINDA ;   et al. | 2018-10-25 |
Methods and Apparatus for Test Insertion Points App 20180128877 - Pradeep; Wilson | 2018-05-10 |
Multiple Input Signature Register Analysis For Digital Circuitry App 20180067164 - MAHESHWARI; NAMAN ;   et al. | 2018-03-08 |
Frequency scaled segmented scan chain for integrated circuits Grant 9,535,123 - Mittal , et al. January 3, 2 | 2017-01-03 |
Frequency Scaled Segmented Scan Chain for Integrated Circuits App 20160266202 - Mittal; Rajesh Kumar ;   et al. | 2016-09-15 |
Testing Of Integrated Circuits During At-speed Mode Of Operation App 20150212152 - Agarwal; Khushboo ;   et al. | 2015-07-30 |
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