loadpatents
Patent applications and USPTO patent grants for Prabhat; Pranay.The latest application filed is for "memory device with on-chip sacrificial memory cells".
Patent | Date |
---|---|
Integrated oscillator Grant 11,398,813 - Fan , et al. July 26, 2 | 2022-07-26 |
Memory Device With On-chip Sacrificial Memory Cells App 20220208265 - Garcia Redondo; Fernando ;   et al. | 2022-06-30 |
Ramp Write Techniques App 20220172762 - Jeloka; Supreet ;   et al. | 2022-06-02 |
Devices and methods to store an initialization state Grant 11,200,940 - Prabhat , et al. December 14, 2 | 2021-12-14 |
Systems and Methods of Power Management App 20210208803 - Myers; James Edward ;   et al. | 2021-07-08 |
Integrated Oscillator App 20210143801 - Fan; Philex Ming-Yan ;   et al. | 2021-05-13 |
Devices and Methods to Store an Initialization State App 20210142839 - Prabhat; Pranay ;   et al. | 2021-05-13 |
Integrated oscillator Grant 10,903,822 - Fan , et al. January 26, 2 | 2021-01-26 |
Selective clock adjustment during read and/or write memory operations Grant 10,896,707 - Chen , et al. January 19, 2 | 2021-01-19 |
Integrated Oscillator App 20200287524 - Fan; Philex Ming-Yan ;   et al. | 2020-09-10 |
Switched source lines for memory applications Grant 10,726,908 - Jeloka , et al. | 2020-07-28 |
Selective Clock Adjustment During Read and/or Write Memory Operations App 20200194047 - Chen; Andy Wangkun ;   et al. | 2020-06-18 |
Periphery body biasing for memory applications Grant 10,586,790 - Prabhat , et al. | 2020-03-10 |
Switched Source Lines for Memory Applications App 20200066358 - Jeloka; Supreet ;   et al. | 2020-02-27 |
Periphery Body Biasing for Memory Applications App 20190304962 - Prabhat; Pranay ;   et al. | 2019-10-03 |
System, method and apparatus for electronic circuit Grant 10,411,705 - Burgess , et al. Sept | 2019-09-10 |
Storage bitcell Grant 10,354,721 - Savanth , et al. July 16, 2 | 2019-07-16 |
Digital forward body biasing in CMOS circuits Grant 10,181,848 - Prabhat , et al. Ja | 2019-01-15 |
Storage Bitcell App 20180233194 - Savanth; Parameshwarappa Anand Kumar ;   et al. | 2018-08-16 |
Digital Forward Body Biasing in CMOS Circuits App 20180219549 - Prabhat; Pranay ;   et al. | 2018-08-02 |
Storage bitcell with isolation Grant 9,940,993 - Savanth , et al. April 10, 2 | 2018-04-10 |
Redundancy schemes for memory cell repair Grant 9,911,510 - Kwon , et al. March 6, 2 | 2018-03-06 |
Storage Bitcell With Isolation App 20170294222 - Savanth; Parameshwarappa Anand Kumar ;   et al. | 2017-10-12 |
Memory circuit and data processing system Grant 9,786,362 - Das , et al. October 10, 2 | 2017-10-10 |
Retention control in a memory device Grant 9,542,994 - Prabhat , et al. January 10, 2 | 2017-01-10 |
Voltage regulation circuitry Grant 8,456,939 - Prabhat June 4, 2 | 2013-06-04 |
Voltage regulation circuitry App 20110141837 - Prabhat; Pranay | 2011-06-16 |
uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.
While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.
All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.