Powell; Douglas O.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Powell; Douglas O..The latest application filed is for "reduced-warpage laminate structure".

Company Profile

1.40.30

Powell; Douglas O. - Endicott NY

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Reduced-warpage laminate structure Grant 10,685,919 - Lamorey , et al.	2020-06-16
Reduced-warpage Laminate Structure App 20170148749 - Lamorey; Mark C. ; et al.	2017-05-25
Reduced-warpage laminate structure Grant 9,613,915 - Lamorey , et al. April 4, 2	2017-04-04
Reduced-warpage laminate structure Grant 9,543,255 - Lamorey , et al. January 10, 2	2017-01-10
Sacrificial carrier dicing of semiconductor wafers Grant 9,484,239 - Graf , et al. November 1, 2	2016-11-01
Sacrificial carrier dicing of semiconductor wafers Grant 9,478,453 - Graf , et al. October 25, 2	2016-10-25
Reduced-warpage Laminate Structure App 20160157357 - Lamorey; Mark C. ; et al.	2016-06-02
Reduced-warpage Laminate Structure App 20160155708 - Lamorey; Mark C. ; et al.	2016-06-02
Sacrificial Carrier Dicing of Semiconductor Wafers App 20160079117 - Graf; Richard S. ; et al.	2016-03-17
Sacrificial Carrier Dicing of Semiconductor Wafers App 20160079111 - Graf; Richard S. ; et al.	2016-03-17
Construction of reliable stacked via in electronic substrates--vertical stiffness control method Grant 9,099,458 - Kacker , et al. August 4, 2	2015-08-04
Construction of reliable stacked via in electronic substrates--vertical stiffness control method Grant 8,866,026 - Kacker , et al. October 21, 2	2014-10-21
Reducing impedance discontinuity in packages Grant 8,791,372 - Harvey , et al. July 29, 2	2014-07-29
Elastic modulus mapping of a chip carrier in a flip chip package Grant 8,756,546 - Cohen , et al. June 17, 2	2014-06-17
Elastic Modulus Mapping Of A Chip Carrier In A Flip Chip Package App 20140033148 - Cohen; Erwin B. ; et al.	2014-01-30
Clustered stacked vias for reliable electronic substrates Grant 8,522,430 - Kacker , et al. September 3, 2	2013-09-03
Method and apparatus to reduce impedance discontinuity in packages Grant 8,440,917 - Harvey , et al. May 14, 2	2013-05-14
Method and Apparatus to Reduce Impedance Discontinuity in Packages App 20130075148 - Harvey; Paul M. ; et al.	2013-03-28
Construction Of Reliable Stacked Via In Electronic Substrates - Vertical Stiffness Control Method App 20120299195 - Kacker; Karan ; et al.	2012-11-29
Clustered Stacked Vias For Reliable Electronic Substrates App 20120279061 - Kacker; Karan ; et al.	2012-11-08
Construction Of Reliable Stacked Via In Electronic Substrates - Vertical Stiffness Control Method App 20120267158 - Kacker; Karan ; et al.	2012-10-25
Construction of reliable stacked via in electronic substrates--vertical stiffness control method Grant 8,258,410 - Kacker , et al. September 4, 2	2012-09-04
Clustered stacked vias for reliable electronic substrates Grant 8,242,593 - Kacker , et al. August 14, 2	2012-08-14
Multi-layered interconnect structure using liquid crystalline polymer dielectric Grant 7,981,245 - Egitto , et al. July 19, 2	2011-07-19
Multi-layered Interconnect Structure Using Liquid Crystalline Polymer Dielectric App 20100218891 - Egitto; Frank D. ; et al.	2010-09-02
Apparatus for crack prevention in integrated circuit packages Grant 7,786,579 - Audet , et al. August 31, 2	2010-08-31
Multi-layered interconnect structure using liquid crystalline polymer dielectric Grant 7,777,136 - Egitto , et al. August 17, 2	2010-08-17
Organic Substrate with Asymmetric Thickness for Warp Mitigation App 20090265028 - Sri-Jayantha; Sri M. ; et al.	2009-10-22
Embedded Constrainer Discs For Reliable Stacked Vias In Electronic Substrates App 20090189289 - Kacker; Karan ; et al.	2009-07-30
Clustered Stacked Vias For Reliable Electronic Substrates App 20090189290 - Kacker; Karan ; et al.	2009-07-30
Construction of Reliable Stacked Via in Electronic Substrates - Vertical Stiffness Control Method App 20090188705 - Kacker; Karan ; et al.	2009-07-30
Method and Apparatus to Reduce Impedance Discontinuity in Packages App 20090126983 - Harvey; Paul M. ; et al.	2009-05-21
Apparatus For Crack Prevention In Integrated Circuit Packages App 20080290510 - Audet; Jean ; et al.	2008-11-27
Multi-layered Interconnect Structure Using Liquid Crystalline Polymer Dielectric App 20080217050 - Egitto; Frank D. ; et al.	2008-09-11
Multi-layered Interconnect Structure Using Liquid Crystalline Polymer Dielectric App 20080178999 - Egitto; Frank D. ; et al.	2008-07-31
Multi-layered interconnect structure using liquid crystalline polymer dielectric Grant 7,301,108 - Egitto , et al. November 27, 2	2007-11-27
Organic dielectric electronic interconnect structures and method for making Grant 7,253,512 - Powell August 7, 2	2007-08-07
Z-interconnections with liquid crystal polymer dielectric films Grant 7,128,256 - Farquhar , et al. October 31, 2	2006-10-31
Joining member for Z-interconnect in electronic devices without conductive paste Grant 7,083,901 - Egitto , et al. August 1, 2	2006-08-01
Method and structure for small pitch z-axis electrical interconnections Grant 6,955,849 - Curcio , et al. October 18, 2	2005-10-18
Organic dielectric electronic interconnect structures and method for making Grant 6,931,723 - Powell August 23, 2	2005-08-23
Organic dielectric electronic interconnect structures and method for making App 20050150686 - Powell, Douglas O.	2005-07-14
Multi-layered interconnect structure using liquid crystalline polymer dielectric App 20050057908 - Egitto, Frank D. ; et al.	2005-03-17
Method and structure for small pitch z-axis electrical interconnections App 20050008833 - Curcio, Brian E. ; et al.	2005-01-13
Method for forming a substructure of a multilayered laminate Grant 6,832,436 - Anstrom , et al. December 21, 2	2004-12-21
Multi-layered interconnect structure using liquid crystalline polymer dielectric Grant 6,826,830 - Egitto , et al. December 7, 2	2004-12-07
Z-interconnections with liquid crystal polymer dielectric films App 20040182509 - Farquhar, Donald S. ; et al.	2004-09-23
Method and structure for small pitch z-axis electrical interconnections Grant 6,790,305 - Curcio , et al. September 14, 2	2004-09-14
Z-interconnections with liquid crystal polymer dielectric films Grant 6,764,748 - Farquhar , et al. July 20, 2	2004-07-20
Method and structure for small pitch z-axis electrical interconnections App 20040067347 - Curcio, Brian E. ; et al.	2004-04-08
Joining member for Z-interconnect in electronic devices without conductive paste App 20040063040 - Egitto, Frank D. ; et al.	2004-04-01
Multi-layered interconnect structure using liquid crystalline polymer dielectric App 20030147227 - Egitto, Frank D. ; et al.	2003-08-07
Method of preparing a printed circuit board Grant RE37,840 - Bhatt , et al. September 17, 2	2002-09-17
Multilayered laminate App 20020108780 - Blackwell, Kim J. ; et al.	2002-08-15
Conductive substructures of a multilayered laminate App 20020100613 - Anstrom, Donald O. ; et al.	2002-08-01
Printed wiring board with improved plated through hole fatigue life Grant 6,423,905 - Brodsky , et al. July 23, 2	2002-07-23
Conductive substructures of a multilayered laminate Grant 6,407,341 - Anstrom , et al. June 18, 2	2002-06-18
Process for selective application of solder to circuit packages Grant 5,597,469 - Carey , et al. January 28, 1	1997-01-28
Method of preparing a printed circuit board Grant 5,557,844 - Bhatt , et al. September 24, 1	1996-09-24
Method for making printed circuit boards with selectivity filled plated through holes Grant 5,487,218 - Bhatt , et al. January 30, 1	1996-01-30
Method of fabricating nendritic materials Grant 5,185,073 - Bindra , et al. February 9, 1	1993-02-09
Separable electrical connection technology Grant 5,137,461 - Bindra , et al. August 11, 1	1992-08-11

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