Pourtois; Geoffrey
Patent Applications and Registrations
Patent applications and USPTO patent grants for Pourtois; Geoffrey.The latest application filed is for "semiconductor fin structure and method of fabricating the same".
- Pourtois; Geoffrey - Villers-la-Ville BE
| Patent | Date |
|---|---|
| Semiconductor fin structure and method of fabricating the same Grant 11,387,350 - Eneman , et al. July 12, 2 | 2022-07-12 |
| Semiconductor Fin Structure And Method Of Fabricating The Same App 20200212205 - Eneman; Geert ; et al. | 2020-07-02 |
| Method Of Manufacturing A Magnetic Memory Device Having Buffer Layer App 20190067564 - Swerts; Johan ; et al. | 2019-02-28 |
| Semiconductors with increased carrier concentration Grant 10,128,338 - Yu , et al. November 13, 2 | 2018-11-13 |
| Magnetic memory device having buffer layer Grant 10,050,192 - Swerts , et al. August 14, 2 | 2018-08-14 |
| Method for transfering a graphene layer Grant 9,982,360 - Huyghebaert , et al. May 29, 2 | 2018-05-29 |
| Spin torque majority gate device Grant 9,979,402 - Vaysset , et al. May 22, 2 | 2018-05-22 |
| Semiconductors With Increased Carrier Concentration App 20180108734 - Yu; Hao ; et al. | 2018-04-19 |
| Two-dimensional material semiconductor device Grant 9,899,501 - Pourtois , et al. February 20, 2 | 2018-02-20 |
| Spin Torque Majority Gate Device App 20170302280 - Vaysset; Adrien ; et al. | 2017-10-19 |
| Two-dimensional Material Semiconductor Device App 20170179263 - Pourtois; Geoffrey ; et al. | 2017-06-22 |
| Magnetic Memory Device Having Buffer Layer App 20170170390 - Swerts; Johan ; et al. | 2017-06-15 |
| Heterosection tunnel field-effect transistor (TFET) Grant 9,608,094 - Verhulst , et al. March 28, 2 | 2017-03-28 |
| Method of producing a III-V fin structure Grant 9,431,519 - Minari , et al. August 30, 2 | 2016-08-30 |
| Spin transfer torque magnetic memory device Grant 9,281,040 - Soree , et al. March 8, 2 | 2016-03-08 |
| Heterosection Tunnel Field-effect Transistor (tfet) App 20160064535 - Verhulst; Anne S. ; et al. | 2016-03-03 |
| Method of Producing a III-V Fin Structure App 20150340503 - Minari; Hideki ; et al. | 2015-11-26 |
| Method For Transfering A Graphene Layer App 20150079399 - Huyghebaert; Cedric ; et al. | 2015-03-19 |
| Spin Transfer Torque Magnetic Memory Device App 20140160835 - Soree; Bart ; et al. | 2014-06-12 |
| Method for manufacturing an III-V engineered substrate and the III-V engineered substrate thereof Grant 8,232,581 - Pourtois , et al. July 31, 2 | 2012-07-31 |
| Method for Manufacturing an III-V Engineered Substrate and the III-V Engineered Substrate Thereof App 20100327316 - Pourtois; Geoffrey ; et al. | 2010-12-30 |
| Dual Work Function Device With Stressor Layer And Method For Manufacturing The Same App 20090174003 - Chang; Shou-Zen ; et al. | 2009-07-09 |
| Method for Modulating the Effective Work Function App 20070272967 - Pantisano; Luigi ; et al. | 2007-11-29 |
uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.
While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.
All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.
| 