Poulis; Spiro

Patent Applications and Registrations

Patent applications and USPTO patent grants for Poulis; Spiro.The latest application filed is for "battery module architecture with horizontal and vertical expandability".

Company Profile

0.13.4

Poulis; Spiro - Tucson AZ
Poulis; Spiro - West Jordan UT US
Poulis; Spiro - Kearns UT

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Battery module architecture with horizontal and vertical expandability Grant 9,917,448 - Zakharyan , et al. March 13, 2	2018-03-13
Battery Module Architecture With Horizontal And Vertical Expandability App 20170085101 - Zakharyan; Kagum G. ; et al.	2017-03-23
Contactor Assembly For Battery Module App 20170062793 - ZAKHARYAN; Kagum G. ; et al.	2017-03-02
Battery module architecture with horizontal and vertical expandability Grant 9,515,497 - Poulis , et al. December 6, 2	2016-12-06
Battery Module Architecture With Horizontal And Vertical Expandability App 20160294198 - Poulis; Spiro ; et al.	2016-10-06
Attenuation and termination circuit using impedance synthesis Grant 8,472,614 - Poulis , et al. June 25, 2	2013-06-25
Attenuation And Termination Circuit Using Impedance Synthesis App 20100119056 - POULIS; Spiro ; et al.	2010-05-13
Attenuation and termination circuit using impedance synthesis Grant 7,660,408 - Poulis , et al. February 9, 2	2010-02-09
Systems and methods for impedance synthesis Grant 6,859,051 - Poulis , et al. February 22, 2	2005-02-22
Systems and methods for impedance synthesis Grant 6,700,387 - Poulis , et al. March 2, 2	2004-03-02
Data signal attenuator and systems and methods for using same Grant 6,697,485 - Poulis , et al. February 24, 2	2004-02-24
System and method for embedding digital information in a dial tone signal Grant 6,661,880 - Poulis , et al. December 9, 2	2003-12-09
Synthesized telephone line ring signal impedance termination Grant 6,654,461 - Poulis , et al. November 25, 2	2003-11-25
System and method for terminating a line by reflecting a scaled impedance Grant 6,567,472 - Poulis , et al. May 20, 2	2003-05-20
UART with direct memory access buffering of data and method therefor Grant 6,434,161 - Higbee , et al. August 13, 2	2002-08-13
Method and system for interfacing parallelly interfaced devices through a serial bus Grant 6,128,311 - Poulis , et al. October 3, 2	2000-10-03

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