Potla; Suresh
Patent Applications and Registrations
Patent applications and USPTO patent grants for Potla; Suresh.The latest application filed is for "gate edge diode leakage reduction".
- Potla; Suresh - Dallas TX
- Potla; Suresh - Plano TX
| Patent | Date |
|---|---|
| Flash memory array structure and method of forming Grant 6,897,516 - Mehrad , et al. May 24, 2 | 2005-05-24 |
| Gate edge diode leakage reduction Grant 6,847,089 - Chakravarthi , et al. January 25, 2 | 2005-01-25 |
| Gate edge diode leakage reduction App 20040195631 - Chakravarthi, Srinivasan ; et al. | 2004-10-07 |
| Gate edge diode leakage reduction App 20040195633 - Chakravarthi, Srinivasan ; et al. | 2004-10-07 |
| Flash memory array structure and method of forming App 20030207527 - Mehrad, Freidoon ; et al. | 2003-11-06 |
| Flash memory array structure and method of forming App 20030006448 - Mehrad, Freidoon ; et al. | 2003-01-09 |
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