loadpatents
name:-0.0074548721313477
name:-0.011178970336914
name:-0.00045680999755859
Pontius; Timothy Patent Filings

Pontius; Timothy

Patent Applications and Registrations

Patent applications and USPTO patent grants for Pontius; Timothy.The latest application filed is for "method and arrangement for rapid silicon prototyping".

Company Profile
0.9.5
  • Pontius; Timothy - Crystal Lake IL
  • Pontius; Timothy - Lake in the Hills IL
  • Pontius; Timothy - Lake in the Woods IL
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Two-phase data-transfer protocol
Grant 8,078,948 - Pontius , et al. December 13, 2
2011-12-13
Clock domain crossing FIFO
Grant 7,187,741 - Pontius , et al. March 6, 2
2007-03-06
Parallel data communication realignment of data sent in multiple groups
Grant 7,085,950 - Ehmann , et al. August 1, 2
2006-08-01
High-speed interchip interface protocol
Grant 6,996,106 - Payne , et al. February 7, 2
2006-02-07
Parallel data communication having skew intolerant data groups
Grant 6,839,862 - Evoy , et al. January 4, 2
2005-01-04
Method and arrangement for rapid silicon prototyping
Grant 6,665,855 - Payne , et al. December 16, 2
2003-12-16
Method And Arrangement For Rapid Silicon Prototyping
App 20030204831 - Payne, Robert ;   et al.
2003-10-30
Parallel communication based on balanced data-bit encoding
Grant 6,636,166 - Sessions , et al. October 21, 2
2003-10-21
Parallel communication based on balanced data-bit encoding
App 20030088317 - Sessions, D.C. ;   et al.
2003-05-08
Clock domain crossing fifo
App 20030081713 - Pontius, Timothy ;   et al.
2003-05-01
Parallel data communication realignment of data sent in multiple groups
App 20030065987 - Ehmann, Gregory E. ;   et al.
2003-04-03
Parallel data communication having skew intolerant data groups
App 20020184552 - Evoy, David R. ;   et al.
2002-12-05
Method and arrangement for rapid silicon prototyping
Grant 6,347,395 - Payne , et al. February 12, 2
2002-02-12
Method and arrangement for passing data between a reference chip and an external bus
Grant 6,154,803 - Pontius , et al. November 28, 2
2000-11-28

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