Patent | Date |
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Computing with both lock-step and free-step processor modes Grant 8,826,288 - Barr , et al. September 2, 2 | 2014-09-02 |
External state cache for computer processor Grant 8,812,781 - Pomaranski , et al. August 19, 2 | 2014-08-19 |
System and method for testing a memory Grant 8,176,250 - Shidla , et al. May 8, 2 | 2012-05-08 |
System and method for testing a memory with an expansion card using DMA Grant 7,797,134 - Barr , et al. September 14, 2 | 2010-09-14 |
System and method for testing a component in a computer system using frequency margining Grant 7,487,399 - Pomaranski , et al. February 3, 2 | 2009-02-03 |
System and method for testing a cell Grant 7,418,367 - Pomaranski , et al. August 26, 2 | 2008-08-26 |
System and method for testing a memory using DMA Grant 7,350,109 - Barr , et al. March 25, 2 | 2008-03-25 |
Computing with both lock-step and free-step processor modes App 20060245264 - Barr; Andrew H. ;   et al. | 2006-11-02 |
Redundant I/O interface management App 20060233204 - Pomaranski; Ken G. ;   et al. | 2006-10-19 |
External state cache for computer processor App 20060236034 - Pomaranski; Ken G. ;   et al. | 2006-10-19 |
System and method for testing an interconnect in a computer system Grant 7,072,788 - Pomaranski , et al. July 4, 2 | 2006-07-04 |
Apparatus and method for detecting and rejecting high impedance failures in chip interconnects Grant 6,995,581 - Barr , et al. February 7, 2 | 2006-02-07 |
System and method for testing a component in a computer system using voltage margining Grant 6,985,826 - Pomaranski , et al. January 10, 2 | 2006-01-10 |
Apparatus and method for monitoring and predicting failures in system interconnect Grant 6,940,288 - Barr , et al. September 6, 2 | 2005-09-06 |
System and method for testing an interconnect in a computer system App 20050125187 - Pomaranski, Ken G. ;   et al. | 2005-06-09 |
Apparatus and method for detecting and rejecting high impedance failures in chip interconnects App 20050116733 - Barr, Andrew H. ;   et al. | 2005-06-02 |
System and method for testing a memory using DMA App 20050120268 - Barr, Andrew H. ;   et al. | 2005-06-02 |
System and method for testing a memory with an expansion card using DMA App 20050107987 - Barr, Andrew H. ;   et al. | 2005-05-19 |
Apparatus and method for monitoring high impedance failures in chip interconnects Grant 6,895,353 - Barr , et al. May 17, 2 | 2005-05-17 |
System and method for testing a component in a computer system using frequency margining App 20050102655 - Pomaranski, Ken G. ;   et al. | 2005-05-12 |
System and method for testing a component in a computer system using voltage margining App 20050096863 - Pomaranski, Ken G. ;   et al. | 2005-05-05 |
System and method for testing a cell App 20050096875 - Pomaranski, Ken G. ;   et al. | 2005-05-05 |
Apparatus and method for detecting and rejecting high impedance failures in chip interconnects Grant 6,879,173 - Barr , et al. April 12, 2 | 2005-04-12 |
System and method for testing a memory App 20050050276 - Shidla, Dale J. ;   et al. | 2005-03-03 |
Apparatus and method for monitoring and predicting failures in system interconnect App 20040245996 - Barr, Andrew H. ;   et al. | 2004-12-09 |
Apparatus and method for detecting and rejecting high impedance failures in chip interconnects App 20040245981 - Barr, Andrew H. ;   et al. | 2004-12-09 |
Apparatus and method for detecting and rejecting high impedance interconnect failures in manufacturing process App 20040246008 - Barr, Andrew H. ;   et al. | 2004-12-09 |
Apparatus and method for detecting high impedance failures in system interconnect App 20040249585 - Barr, Andrew H. ;   et al. | 2004-12-09 |
Apparatus and method for monitoring high impedance failures in chip interconnects App 20040249612 - Barr, Andrew H. ;   et al. | 2004-12-09 |