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Level shifter circuit having two-domain level shifting capability
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Level Shifter Circuit Having Two-Domain Level Shifting Capability
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Circuit and method for reading a memory cell of a non-volatile memory device
Grant 10,249,373 - Campardo , et al. | 2019-04-02 |
Phase change memory device and method of operation
Grant 10,186,317 - Perroni , et al. Ja | 2019-01-22 |
Address decoder for a non-volatile memory array using MOS selection transistors
Grant 10,115,462 - Polizzi , et al. October 30, 2 | 2018-10-30 |
Memory device with progressive row reading and related reading method
Grant 10,002,672 - Campardo , et al. June 19, 2 | 2018-06-19 |
Level shifter circuit and associated memory device
Grant 9,972,394 - Conte , et al. May 15, 2 | 2018-05-15 |
Circuit And Method For Reading A Memory Cell Of A Non-volatile Memory Device
App 20180130538 - Campardo; Giovanni ; et al. | 2018-05-10 |
Row decoder for a non-volatile memory device, and non-volatile memory device
Grant 9,966,145 - Polizzi , et al. May 8, 2 | 2018-05-08 |
Phase Change Memory Device and Method of Operation
App 20180108405 - Perroni; Maurizio Francesco ; et al. | 2018-04-19 |
Address Decoder for a Non-Volatile Memory Array Using MOS Selection Transistors
App 20180096727 - Polizzi; Salvatore ; et al. | 2018-04-05 |
Level Shifter Circuit
App 20180061495 - Conte; Antonino ; et al. | 2018-03-01 |
Memory Device with Progressive Row Reading and Related Reading Method
App 20180047455 - Campardo; Giovanni ; et al. | 2018-02-15 |
Phase change memory device and method of operation
Grant 9,865,346 - Perroni , et al. January 9, 2 | 2018-01-09 |
Circuit and method for reading a memory cell of a non-volatile memory device
Grant 9,865,356 - Campardo , et al. January 9, 2 | 2018-01-09 |
Memory device with progressive row reading and related reading method
Grant 9,805,810 - Campardo , et al. October 31, 2 | 2017-10-31 |
Row decoder for a non-volatile memory device, having reduced area occupation
Grant 9,767,907 - Polizzi , et al. September 19, 2 | 2017-09-19 |
Row Decoder For A Non-volatile Memory Device, And Non-volatile Memory Device
App 20170263319 - Polizzi; Salvatore ; et al. | 2017-09-14 |
Circuit and Method for Reading a Memory Cell of a Non-Volatile Memory Device
App 20170263323 - Campardo; Giovanni ; et al. | 2017-09-14 |
Row decoder for a non-volatile memory device, and non-volatile memory device
Grant 9,679,655 - Polizzi , et al. June 13, 2 | 2017-06-13 |
Row Decoder For A Non-volatile Memory Device, Having Reduced Area Occupation
App 20170084334 - Polizzi; Salvatore ; et al. | 2017-03-23 |
Row Decoder for a Non-Volatile Memory Device, and Non-Volatile Memory Device
App 20170062055 - Polizzi; Salvatore ; et al. | 2017-03-02 |
Row decoder circuit for a phase change non-volatile memory device
Grant 8,982,612 - Perroni , et al. March 17, 2 | 2015-03-17 |
Row Decoder Circuit For A Phase Change Non-volatile Memory Device
App 20130301348 - Perroni; Maurizio Francesco ; et al. | 2013-11-14 |
Protection register for a phase-change memory
Grant 7,916,526 - Donze , et al. March 29, 2 | 2011-03-29 |
Protection Register For A Phase-change Memory
App 20100165715 - Donze; Enzo Michele ; et al. | 2010-07-01 |
Method of generating an enable signal of a standard memory core and relative memory device
Grant 7,519,751 - Perroni , et al. April 14, 2 | 2009-04-14 |
Driving circuit of an output buffer stage having a high speed and a reduced noise induced on power supply
Grant 7,408,377 - Castagna , et al. August 5, 2 | 2008-08-05 |
Integrated device with multiple reading and/or writing commands
Grant 7,376,810 - Polizzi , et al. May 20, 2 | 2008-05-20 |
Non-volatile memory device architecture, for instance a flash kind, having a serial communication interface
Grant 7,151,705 - Polizzi , et al. December 19, 2 | 2006-12-19 |
Hybrid architecture for realizing a random numbers generator
Grant 7,139,397 - Messina , et al. November 21, 2 | 2006-11-21 |
Driving circuit of an output buffer stage having a high speed and a reduced noise induced on power supply
App 20060091910 - Castagna; Giuseppe ; et al. | 2006-05-04 |
Method of writing a group of data bytes in a memory and memory device
Grant 6,996,697 - Poli , et al. February 7, 2 | 2006-02-07 |
Memory device outputting read data in a time starting from a rising edge of an external clock that is shorter than that of known devices
Grant 6,990,596 - Polizzi , et al. January 24, 2 | 2006-01-24 |
Device and method for reading non-volatile memories having at least one pseudo-parallel communication interface
Grant 6,975,559 - Perroni , et al. December 13, 2 | 2005-12-13 |
Non-volatile memory device architecture, for instance a flash kind, having a serial communication interface
App 20050213421 - Polizzi, Salvatore ; et al. | 2005-09-29 |
Memory device accessible with different communication protocols
Grant 6,927,991 - Perroni , et al. August 9, 2 | 2005-08-09 |
Integrated memory device with multiple reading and writing commands
App 20050120159 - Polizzi, Salvatore ; et al. | 2005-06-02 |
Nonvolatile memory device with parallel and serial functioning mode and selectable communication protocol
Grant 6,894,914 - Perroni , et al. May 17, 2 | 2005-05-17 |
Memory Device Accessible With Different Communication Protocols
App 20050099833 - Perroni, Maurizio Francesco ; et al. | 2005-05-12 |
Nonvolatile memory device with double serial/parallel communication interface
Grant 6,892,269 - Polizzi , et al. May 10, 2 | 2005-05-10 |
Fast Page Programming Architecture And Method In A Non-volatile Memory Device With An Spi Interface
App 20050041471 - Schillaci, Paolino ; et al. | 2005-02-24 |
Method of generating an enable signal of a standard memory core and relative memory device
App 20050030801 - Perroni, Maurizio Francesco ; et al. | 2005-02-10 |
Semiconductor memory with multiprotocol serial communication interface
App 20050013153 - Perroni, Maurizio Francesco ; et al. | 2005-01-20 |
Testing method and device for non-volatile memories having a LPC (low pin count) communication serial interface
Grant 6,785,174 - Messina , et al. August 31, 2 | 2004-08-31 |
Testing method and device for non-volatile memories having a LPC (low pin count) communication serial interface
App 20040071028 - Messina, Marco ; et al. | 2004-04-15 |
Memory device and method for reading sequentially groups of bits from a memory device
App 20040004886 - Perroni, Maurizio ; et al. | 2004-01-08 |
Device and method for reading non-volatile memories having at least one pseudo-parallel communication interface
App 20040001366 - Perroni, Maurizio ; et al. | 2004-01-01 |
Method of writing a group of data bytes in a memory and memory device
App 20030182533 - Poli, Salvatore ; et al. | 2003-09-25 |
Memory device
App 20030123306 - Polizzi, Salvatore ; et al. | 2003-07-03 |
Nonvolatile memory device with parallel and serial functioning mode and selectable communication protocol
App 20030090939 - Perroni, Maurizio ; et al. | 2003-05-15 |
Nonvolatile memory device with double serial/parallel communication interface
App 20030088729 - Polizzi, Salvatore ; et al. | 2003-05-08 |
Hybrid architecture for realizing a random numbers generator
App 20030059046 - Messina, Marco ; et al. | 2003-03-27 |
Low-consumption power-on reset circuit for semiconductor memories
App 20010019281 - Polizzi, Salvatore ; et al. | 2001-09-06 |
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