| Patent | Date |
|---|
Majority-tabular post processing of quasi-cyclic low-density parity-check codes
Grant 8,977,939 - Podkolzin , et al. March 10, 2 | 2015-03-10 |
Majority-Tabular Post Processing of Quasi-Cyclic Low-Density Parity-Check Codes
App 20140181624 - Podkolzin; Alexander S. ; et al. | 2014-06-26 |
Method and apparatus for finding optimal unification substitution for formulas in technology library
Grant 7,003,739 - Gasanov , et al. February 21, 2 | 2006-02-21 |
Method and apparatus for finding optimal unification substitution for formulas in technology library
App 20050114804 - Gasanov, Elyar E. ; et al. | 2005-05-26 |
Method and apparatus for optimizing the timing of integrated circuits
Grant 6,868,535 - Podkolzin , et al. March 15, 2 | 2005-03-15 |
Method and apparatus for dynamic buffer and inverter tree optimization
Grant 6,681,373 - Zolotykh , et al. January 20, 2 | 2004-01-20 |
Method and apparatus for quick search for identities applicable to specified formula
Grant 6,637,011 - Zolotykh , et al. October 21, 2 | 2003-10-21 |
Hexagonal architecture
Grant 6,407,434 - Rostoker , et al. June 18, 2 | 2002-06-18 |
Physical design automation system and process for designing integrated circuit chips using multiway partitioning with constraints
Grant 6,134,702 - Scepanovic , et al. October 17, 2 | 2000-10-17 |
Triangular semiconductor or gate
Grant 6,097,073 - Rostoker , et al. August 1, 2 | 2000-08-01 |
Architecture having diamond shaped or parallelogram shaped cells
Grant 5,973,376 - Rostoker , et al. October 26, 1 | 1999-10-26 |
Physical design automation system and process for designing integrated circuit chips using highly parallel sieve optimization with multiple "jiggles"
Grant 5,909,376 - Scepanovic , et al. June 1, 1 | 1999-06-01 |
Tri-directional interconnect architecture for SRAM
Grant 5,889,329 - Rostoker , et al. March 30, 1 | 1999-03-30 |
Hexagonal sense cell architecture
Grant 5,872,380 - Rostoker , et al. February 16, 1 | 1999-02-16 |
Triangular semiconductor NAND gate
Grant 5,864,165 - Rostoker , et al. January 26, 1 | 1999-01-26 |
Physical design automation system and method using monotonically improving linear clusterization
Grant 5,838,585 - Scepanovic , et al. November 17, 1 | 1998-11-17 |
Triangular semiconductor "AND" gate device
Grant 5,834,821 - Rostoker , et al. November 10, 1 | 1998-11-10 |
CAD for hexagonal architecture
Grant 5,822,214 - Rostoker , et al. October 13, 1 | 1998-10-13 |
Transistors having dynamically adjustable characteristics
Grant 5,811,863 - Rostoker , et al. September 22, 1 | 1998-09-22 |
Polydirectional non-orthoginal three layer interconnect architecture
Grant 5,808,330 - Rostoker , et al. September 15, 1 | 1998-09-15 |
Hexagonal SRAM architecture
Grant 5,801,422 - Rostoker , et al. September 1, 1 | 1998-09-01 |
Hexagonal architecture with triangular shaped cells
Grant 5,789,770 - Rostoker , et al. August 4, 1 | 1998-08-04 |
Hexagonal field programmable gate array architecture
Grant 5,777,360 - Rostoker , et al. July 7, 1 | 1998-07-07 |
Hexagonal DRAM array
Grant 5,742,086 - Rostoker , et al. April 21, 1 | 1998-04-21 |
Physical design automation system and process for designing integrated circuit chips using fuzzy cell clusterization
Grant 5,712,793 - Scepanovic , et al. January 27, 1 | 1998-01-27 |
Physical design automation system and process for designing integrated circuit chips using multiway partitioning with constraints
Grant 5,699,265 - Scepanovic , et al. December 16, 1 | 1997-12-16 |
Physical design automation system and method using hierarchical clusterization and placement improvement based on complete re-placement of cell clusters
Grant 5,661,663 - Scepanovic , et al. August 26, 1 | 1997-08-26 |
Microelectronic integrated circuit including triangular CMOS "nand" gate device
Grant 5,650,653 - Rostoker , et al. July 22, 1 | 1997-07-22 |
Microelectronic integrated circuit structure and method using three directional interconnect routing based on hexagonal geometry
Grant 5,578,840 - Scepanovic , et al. November 26, 1 | 1996-11-26 |
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