loadpatents
Patent applications and USPTO patent grants for Poddar; Anindya.The latest application filed is for "semiconductor package with isolated heat spreader".
Patent | Date |
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Bump bond structure for enhanced electromigration performance Grant 11,450,638 - Mishra , et al. September 20, 2 | 2022-09-20 |
Integration of a passive component in a cavity of an integrated circuit package Grant 11,430,722 - Morroni , et al. August 30, 2 | 2022-08-30 |
Packaged semiconductor devices for high voltage with die edge protection Grant 11,417,579 - Kim , et al. August 16, 2 | 2022-08-16 |
Fan-out electronic device Grant 11,410,875 - Nguyen , et al. August 9, 2 | 2022-08-09 |
Semiconductor Package With Isolated Heat Spreader App 20220238424 - Poddar; Anindya ;   et al. | 2022-07-28 |
Integrated circuit backside metallization Grant 11,367,699 - Sada , et al. June 21, 2 | 2022-06-21 |
Semiconductor package with isolated heat spreader Grant 11,302,615 - Poddar , et al. April 12, 2 | 2022-04-12 |
Embedded Die Packaging With Integrated Ceramic Substrate App 20220108955 - Kim; Woochan ;   et al. | 2022-04-07 |
Metal Ribs In Electromechanical Devices App 20220069795 - PODDAR; Anindya ;   et al. | 2022-03-03 |
Stress buffer layer in embedded package Grant 11,183,441 - Kim , et al. November 23, 2 | 2021-11-23 |
Embedded die packaging with integrated ceramic substrate Grant 11,183,460 - Kim , et al. November 23, 2 | 2021-11-23 |
Embedded die package multichip module Grant 11,158,595 - Kim , et al. October 26, 2 | 2021-10-26 |
Semiconductor Package With Isolated Heat Spreader App 20210202357 - Poddar; Anindya ;   et al. | 2021-07-01 |
Copper passivation Grant 11,021,786 - Nguyen , et al. June 1, 2 | 2021-06-01 |
Frame Design In Embedded Die Package App 20210134729 - Kim; Woochan ;   et al. | 2021-05-06 |
Electronic Package For Integrated Circuits And Related Methods App 20210090940 - Wachtler; Kurt Peter ;   et al. | 2021-03-25 |
Integrated Circuit Backside Metallization App 20210035932 - SADA; Hiroyuki ;   et al. | 2021-02-04 |
Electronic device with double-sided cooling Grant 10,879,155 - Kim , et al. December 29, 2 | 2020-12-29 |
Bump Bond Structure For Enhanced Electromigration Performance App 20200402938 - Mishra; Dibyajat ;   et al. | 2020-12-24 |
Electronic package for integrated circuits and related methods Grant 10,861,741 - Wachtler , et al. December 8, 2 | 2020-12-08 |
Packaged Semiconductor Devices For High Voltage With Die Edge Protection App 20200381322 - Kim; Woochan ;   et al. | 2020-12-03 |
Electronic Device With Double-sided Cooling App 20200357729 - Kim; Woochan ;   et al. | 2020-11-12 |
Bump bond structure for enhanced electromigration performance Grant 10,763,231 - Mishra , et al. Sep | 2020-09-01 |
Integrated circuit backside metallization Grant 10,763,230 - Sada , et al. Sep | 2020-09-01 |
Packaged semiconductor devices for high voltage with die edge protection Grant 10,748,827 - Kim , et al. A | 2020-08-18 |
Integration of a passive component in an integrated circuit package Grant 10,734,313 - Morroni , et al. | 2020-08-04 |
Fan-out Electronic Device App 20200203219 - Nguyen; Hau Thanh ;   et al. | 2020-06-25 |
Stress Buffer Layer in Embedded Package App 20200203249 - Kim; Woochan ;   et al. | 2020-06-25 |
Integrated Circuit Backside Metallization App 20200203295 - SADA; Hiroyuki ;   et al. | 2020-06-25 |
Copper Passivation App 20200173013 - Nguyen; Luu Thanh ;   et al. | 2020-06-04 |
High Voltage Flip-Chip On Lead (FOL) Package App 20200161225 - Poddar; Anindya ;   et al. | 2020-05-21 |
Additive deposition low temperature curable magnetic interconnecting layer for power components integration Grant 10,650,957 - Yan , et al. | 2020-05-12 |
Additive Deposition Low Temperature Curable Magnetic Interconnecting Layer For Power Components Integration App 20200135381 - Yan; Yi ;   et al. | 2020-04-30 |
Inkjet Printed Electronic Components App 20200105453 - YAN; Yi ;   et al. | 2020-04-02 |
Embedded Die Packaging With Integrated Ceramic Substrate App 20200091076 - Kim; Woochan ;   et al. | 2020-03-19 |
High Voltage Flip-chip On Lead (fol) Package App 20200091048 - Poddar; Anindya ;   et al. | 2020-03-19 |
Packaged Semiconductor Devices For High Voltage With Die Edge Protection App 20200075441 - Kim; Woochan ;   et al. | 2020-03-05 |
Stress buffer layer in embedded package Grant 10,580,715 - Kim , et al. | 2020-03-03 |
High voltage flip-chip on lead (FOL) package Grant 10,580,722 - Poddar , et al. | 2020-03-03 |
Semiconductor systems having dual leadframes Grant 10,573,582 - Joshi , et al. Feb | 2020-02-25 |
Printed Repassivation For Wafer Chip Scale Packaging App 20200043878 - Komatsu; Daiki ;   et al. | 2020-02-06 |
Bump Bond Structure For Enhanced Electromigration Performance App 20200035633 - Mishra; Dibyajat ;   et al. | 2020-01-30 |
Printed repassivation for wafer chip scale packaging Grant 10,541,220 - Komatsu , et al. Ja | 2020-01-21 |
Stress Buffer Layer in Embedded Package App 20190385924 - Kim; Woochan ;   et al. | 2019-12-19 |
Integrated Circuit (ic) Packages With Shields And Methods Of Producing The Same App 20190287918 - Kim; Woochan ;   et al. | 2019-09-19 |
Semiconductor Systems Having Premolded Dual Leadframes App 20190237395 - Joshi; Rajeev D. ;   et al. | 2019-08-01 |
Method And Structure To Eliminate Substrate Coupling In Common Drain Devices App 20190206741 - PODDAR; Anindya ;   et al. | 2019-07-04 |
Semiconductor systems having premolded dual leadframes Grant 10,312,184 - Joshi , et al. | 2019-06-04 |
Electronic Package For Integrated Circuits And Related Methods App 20190164807 - Wachtler; Kurt Peter ;   et al. | 2019-05-30 |
Embedded Die Package Multichip Module App 20190013288 - KIM; WOOCHAN ;   et al. | 2019-01-10 |
Integration Of A Passive Component In A Cavity Of An Integrated Circuit Package App 20180301402 - MORRONI; Jeffrey ;   et al. | 2018-10-18 |
Integration Of A Passive Component In A Cavity Of An Integrated Circuit Package App 20180301403 - MORRONI; Jeffrey ;   et al. | 2018-10-18 |
Integration Of A Passive Component In An Integrated Circuit Package App 20180301404 - MORRONI; Jeffrey ;   et al. | 2018-10-18 |
Forming Integrated Inductors And Transformers With Embedded Magnetic Cores App 20180040420 - Poddar; Anindya | 2018-02-08 |
Open cavity package using chip-embedding technology Grant 9,663,357 - Mao , et al. May 30, 2 | 2017-05-30 |
Semiconductor Systems Having Premolded Dual Leadframes App 20170125324 - Joshi; Rajeev D. ;   et al. | 2017-05-04 |
Open Cavity Package Using Chip-embedding Technology App 20170015548 - Mao; Jie ;   et al. | 2017-01-19 |
Dual Sided Embedded Die And Fabrication Of Same Background App 20160240392 - Poddar; Anindya ;   et al. | 2016-08-18 |
Dual Sided Embedded Die And Fabrication Of Same Background App 20150147845 - Poddar; Anindya ;   et al. | 2015-05-28 |
Forming Integrated Inductors And Transformers With Embedded Magnetic Cores App 20150143690 - Poddar; Anindya | 2015-05-28 |
Multilayer high voltage isolation barrier in an integrated circuit Grant 9,035,422 - Khanolkar , et al. May 19, 2 | 2015-05-19 |
Multilayer High Voltage Isolation Barrier in an Integrated Circuit App 20150069572 - Khanolkar; Vijaylaxmi ;   et al. | 2015-03-12 |
Method And Structure Of Panelized Packaging Of Semiconductor Devices App 20150008566 - Gerber; Mark A. ;   et al. | 2015-01-08 |
Thermally efficient integrated circuit package Grant 8,716,830 - Poddar , et al. May 6, 2 | 2014-05-06 |
Method and apparatus for achieving galvanic isolation in package having integral isolation medium Grant 8,674,418 - Poddar , et al. March 18, 2 | 2014-03-18 |
Micro surface mount device packaging Grant 8,450,151 - Poddar , et al. May 28, 2 | 2013-05-28 |
Thermally Efficient Integrated Circuit Package App 20130127008 - Poddar; Anindya ;   et al. | 2013-05-23 |
Micro Surface Mount Device Packaging App 20130127044 - Poddar; Anindya ;   et al. | 2013-05-23 |
Micro Surface Mount Device Packaging App 20130127043 - Poddar; Anindya ;   et al. | 2013-05-23 |
Method And Apparatus For Achieving Galvanic Isolation In Package Having Integral Isolation Medium App 20130043970 - PODDAR; Anindya ;   et al. | 2013-02-21 |
Low Profile Package And Method App 20120326300 - FENG; Tao ;   et al. | 2012-12-27 |
Lead frame interconnect scheme with high power density Grant 8,283,760 - Pham , et al. October 9, 2 | 2012-10-09 |
Thin Foil Semiconductor Package App 20120043660 - Poddar; Anindya ;   et al. | 2012-02-23 |
Foil based semiconductor package Grant 8,101,470 - Poddar , et al. January 24, 2 | 2012-01-24 |
Laser Ablation Alternative To Low Cost Leadframe Process App 20110269269 - TU; Nghia T. ;   et al. | 2011-11-03 |
Integrated circuit package Grant 7,923,825 - Bayan , et al. April 12, 2 | 2011-04-12 |
Foil Based Semiconductor Package App 20110074003 - PODDAR; Anindya ;   et al. | 2011-03-31 |
Intergrated circuit packaging with improved die bonding Grant 7,838,974 - Poddar , et al. November 23, 2 | 2010-11-23 |
Inkjet printed leadframe Grant 7,824,963 - Walberg , et al. November 2, 2 | 2010-11-02 |
Wafer Level Method Of Forming Side Fiber Insertion Optoelectronic Packages App 20100151614 - DARBINYAN; Artur ;   et al. | 2010-06-17 |
Integrated circuit package Grant 7,705,476 - Bayan , et al. April 27, 2 | 2010-04-27 |
Wafer level optoelectronic package with fiber side insertion Grant 7,703,993 - Darbinyan , et al. April 27, 2 | 2010-04-27 |
Thin Foil For Use In Packaging Integrated Circuits App 20100084748 - PODDAR; Anindya ;   et al. | 2010-04-08 |
Inkjet Printed Leadframe App 20100072613 - Walberg; Randall L. ;   et al. | 2010-03-25 |
Inkjet printed leadframes Grant 7,667,304 - Walberg , et al. February 23, 2 | 2010-02-23 |
Integrated Circuit Package App 20100025818 - BAYAN; Jaime A. ;   et al. | 2010-02-04 |
Bond pad stacks for ESD under pad and active under pad bonding Grant 7,652,379 - Poddar January 26, 2 | 2010-01-26 |
Methods And Systems For Packaging Integrated Circuits With Thin Metal Contacts App 20100015329 - NGUYEN; Luu T. ;   et al. | 2010-01-21 |
Methods and systems for packaging integrated circuits with integrated passive components Grant 7,615,407 - Poddar , et al. November 10, 2 | 2009-11-10 |
Method of packaging integrated circuits Grant 7,612,435 - Bayan , et al. November 3, 2 | 2009-11-03 |
Inkjet Printed Leadframes App 20090267216 - Walberg; Randall L. ;   et al. | 2009-10-29 |
I/o Pad Structure For Enhancing Solder Joint Reliability In Integrated Circuit Devices App 20090174069 - Nguyen; Hau ;   et al. | 2009-07-09 |
Method Of Packaging Integrated Circuits App 20090160037 - BAYAN; Jaime A. ;   et al. | 2009-06-25 |
Integrated Circuit Package App 20090115035 - BAYAN; Jaime A. ;   et al. | 2009-05-07 |
Leadframe App 20090072367 - PODDAR; Anindya ;   et al. | 2009-03-19 |
Gang flipping for IC packaging Grant 7,491,625 - Bayan , et al. February 17, 2 | 2009-02-17 |
Bond pad stacks for ESD under pad and active under pad bonding App 20090026621 - Poddar; Anindya | 2009-01-29 |
Gang Flipping For Flip-chip Packaging App 20080241991 - Poddar; Anindya ;   et al. | 2008-10-02 |
Gang Flipping For Ic Packaging App 20080241993 - Bayan; Jaime A. ;   et al. | 2008-10-02 |
Under-bond pad structures for integrated circuit devices Grant 7,385,297 - Gumaste , et al. June 10, 2 | 2008-06-10 |
Thermal release wafer mount tape with B-stage adhesive Grant 7,354,802 - Poddar , et al. April 8, 2 | 2008-04-08 |
Thermal release wafer mount tape with B-stage adhesive Grant 7,101,620 - Poddar , et al. September 5, 2 | 2006-09-05 |
Stacked die package for semiconductor devices Grant 7,015,587 - Poddar March 21, 2 | 2006-03-21 |
Spacer with passive components for use in multi-chip modules Grant 6,933,597 - Poddar , et al. August 23, 2 | 2005-08-23 |
Method and apparatus for lead-frame based grid array IC packaging Grant 6,664,615 - Bayan , et al. December 16, 2 | 2003-12-16 |
Process and structure improvements to shellcase style packaging technology Grant 6,607,941 - Prabhu , et al. August 19, 2 | 2003-08-19 |
Integrated circuit package having die with staggered bond pads and die pad assignment methodology for assembly of staggered die in single-tier ebga packages Grant 6,603,199 - Poddar August 5, 2 | 2003-08-05 |
Process And Structure Improvements To Shellcase Style Packaging Technology App 20030134453 - Prabhu, Ashok ;   et al. | 2003-07-17 |
Substrate strips for use in integrated circuit packaging Grant 6,278,618 - Lee , et al. August 21, 2 | 2001-08-21 |
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