Pistorius; Erhard Joachim
Patent Applications and Registrations
Patent applications and USPTO patent grants for Pistorius; Erhard Joachim.The latest application filed is for "configurable hybrid adder circuitry".
- Pistorius; Erhard Joachim - Mountain View CA
- Pistorius; Erhard Joachim - Milpitas CA
| Patent | Date |
|---|---|
| Configurable hybrid adder circuitry Grant 9,292,474 - Pistorius , et al. March 22, 2 | 2016-03-22 |
| Stacked die network-on-chip for FPGA Grant 8,863,065 - Chow , et al. October 14, 2 | 2014-10-14 |
| Stacked die network-on-chip for FPGA Grant 8,719,753 - Chow , et al. May 6, 2 | 2014-05-06 |
| Configurable hybrid adder circuitry Grant 8,521,801 - Pistorius , et al. August 27, 2 | 2013-08-27 |
| Method and apparatus for comparing programmable logic device configurations Grant 8,161,469 - Iotov , et al. April 17, 2 | 2012-04-17 |
| Dedicated function block interfacing with general purpose function blocks on integrated circuits Grant 7,804,325 - Pistorius , et al. September 28, 2 | 2010-09-28 |
| Stacked die network-on-chip for FPGA Grant 7,701,252 - Chow , et al. April 20, 2 | 2010-04-20 |
| Configurable Hybrid Adder Circuitry App 20090271465 - Pistorius; Erhard Joachim ; et al. | 2009-10-29 |
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