| Patent | Date |
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Auto-referenced Memory Cell Read Techniques
App 20220208262 - Mirichigni; Graziano ; et al. | 2022-06-30 |
Redundant cloud memory storage for a memory subsystem
Grant 11,360,868 - Pio June 14, 2 | 2022-06-14 |
Systems and techniques for accessing multiple memory cells concurrently
Grant 11,335,402 - Pio May 17, 2 | 2022-05-17 |
Auto-referenced memory cell read techniques
Grant 11,282,574 - Mirichigni , et al. March 22, 2 | 2022-03-22 |
Semiconductor Packages With Patterns Of Die-specific Information
App 20210257225 - Pio; Federico | 2021-08-19 |
Semiconductor packages with patterns of die-specific information
Grant 11,031,258 - Pio June 8, 2 | 2021-06-08 |
Semiconductor Packages With Patterns Of Die-specific Information
App 20210057233 - Pio; Federico | 2021-02-25 |
Semiconductor Packages With Indications Of Die-specific Information
App 20210057232 - Pio; Federico | 2021-02-25 |
Auto-referenced Memory Cell Read Techniques
App 20210020239 - Mirichigni; Graziano ; et al. | 2021-01-21 |
Auto-referenced memory cell read techniques
Grant 10,896,727 - Mirichigni , et al. January 19, 2 | 2021-01-19 |
Redundant Cloud Memory Storage For A Memory Subsystem
App 20200387434 - Pio; Federico | 2020-12-10 |
Auto-referenced Memory Cell Read Techniques
App 20200294586 - Mirichigni; Graziano ; et al. | 2020-09-17 |
Systems And Techniques For Accessing Multiple Memory Cells Concurrently
App 20200202928 - Pio; Federico | 2020-06-25 |
Auto-referenced memory cell read techniques
Grant 10,600,480 - Mirichigni , et al. | 2020-03-24 |
Auto-referenced Memory Cell Read Techniques
App 20200035297 - Mirichigni; Graziano ; et al. | 2020-01-30 |
Nonvolatile storage using low latency and high latency memory
Grant 10,452,541 - Pio Oc | 2019-10-22 |
Auto-referenced memory cell read techniques
Grant 10,431,301 - Mirichigni , et al. O | 2019-10-01 |
Auto-referenced Memory Cell Read Techniques
App 20190198099 - Mirichigni; Graziano ; et al. | 2019-06-27 |
Nonvolatile Storage Using Low Latency And High Latency Memory
App 20190087330 - Pio; Federico | 2019-03-21 |
Nonvolatile storage using low latency and high latency memory
Grant 10,114,746 - Pio October 30, 2 | 2018-10-30 |
Double-polarity memory read
Grant 10,102,891 - Tortorelli , et al. October 16, 2 | 2018-10-16 |
Double-polarity Memory Read
App 20180102149 - TORTORELLI; Innocenzo ; et al. | 2018-04-12 |
Double-polarity memory read
Grant 9,799,381 - Tortorelli , et al. October 24, 2 | 2017-10-24 |
Three dimensional memory array architecture
Grant 9,595,667 - Pio March 14, 2 | 2017-03-14 |
Three dimensional memory array architecture
Grant 9,444,046 - Pio September 13, 2 | 2016-09-13 |
Method of dynamically selecting memory cell capacity
Grant 9,437,254 - Pio September 6, 2 | 2016-09-06 |
Three Dimensional Memory Array Architecture
App 20160149126 - Pio; Federico | 2016-05-26 |
Method for making three dimensional memory array architecture using phase change and ovonic switching materials
Grant 9,252,362 - Pio February 2, 2 | 2016-02-02 |
Method Of Dynamically Selecting Memory Cell Capacity
App 20150262628 - Pio; Federico | 2015-09-17 |
Method of accessing a memory device
Grant 9,076,524 - Pio July 7, 2 | 2015-07-07 |
Three Dimensional Memory Array Architecture
App 20150044849 - Pio; Federico | 2015-02-12 |
Three Dimensional Memory Array Architecture
App 20140295638 - Pio; Federico | 2014-10-02 |
Three dimensional memory array architecture
Grant 8,841,649 - Pio September 23, 2 | 2014-09-23 |
Method Of Using Memory Instruction Including Parameter To Affect Operating Condition Of Memory
App 20140250280 - Pio; Federico | 2014-09-04 |
Method of using memory instruction including parameter to affect operating condition of memory
Grant 8,824,213 - Pio September 2, 2 | 2014-09-02 |
Integrated circuit dice with edge finishing
Grant 8,759,969 - Pio June 24, 2 | 2014-06-24 |
Memory instruction including parameter to affect operating condition of memory
Grant 8,737,138 - Pio May 27, 2 | 2014-05-27 |
Method of manufacturing upwardly tapering heaters for phase change memories
Grant 8,728,856 - Pio May 20, 2 | 2014-05-20 |
Three dimensional memory array architecture
Grant 8,729,523 - Pio May 20, 2 | 2014-05-20 |
Three Dimensional Memory Array Architecture
App 20140061574 - Pio; Federico | 2014-03-06 |
Three Dimensional Memory Array Architecture
App 20140061575 - Pio; Federico | 2014-03-06 |
Method Of Using Memory Instruction Including Parameter To Affect Operating Condition Of Memory
App 20130167251 - Pio; Federico | 2013-06-27 |
Upwardly Tapering Heaters For Phase Change Memories
App 20130134380 - Pio; Federico | 2013-05-30 |
Upwardly tapering heaters for phase change memories
Grant 8,361,833 - Pio January 29, 2 | 2013-01-29 |
System, apparatus, and reading method for NAND memories
Grant 8,248,851 - Pio August 21, 2 | 2012-08-21 |
Memory Instruction Including Parameter To Affect Operating Condition Of Memory
App 20120127807 - Pio; Federico | 2012-05-24 |
Upwardly Tapering Heaters for Phase Change Memories
App 20120126196 - Pio; Federico | 2012-05-24 |
Nonvolatile Storage Using Low Latency And High Latency Memory
App 20120096246 - Pio; Federico | 2012-04-19 |
Integrated circuit edge and method to fabricate the same
Grant 8,093,090 - Pio January 10, 2 | 2012-01-10 |
Exploiting a statistical distribution of the values of an electrical characteristic in a population of auxiliary memory cells for obtaining reference cells
Grant 7,630,263 - Pio December 8, 2 | 2009-12-08 |
Electronic memory circuit and related manufacturing method
Grant 7,601,590 - Pio October 13, 2 | 2009-10-13 |
Method for compacting the erased threshold voltage distribution of flash memory devices during writing operations
Grant 7,529,136 - Micheloni , et al. May 5, 2 | 2009-05-05 |
Memory device with time-shifting based emulation of reference cells
Grant 7,345,905 - Pio , et al. March 18, 2 | 2008-03-18 |
Method For Compacting The Erased Threshold Voltage Distribution Of Flash Memory Devices During Writing Operations
App 20080049521 - Micheloni; Rino ; et al. | 2008-02-28 |
Memory device with time-shifting based emulation of reference cells
App 20060209594 - Pio; Federico ; et al. | 2006-09-21 |
Exploiting a statistical distribution of the values of an electrical characteristic in a population of auxiliary memory cells for obtaining reference cells
App 20060164898 - Pio; Federico | 2006-07-27 |
Electronic memory circuit and related manufacturing method
App 20050122778 - Pio, Federico | 2005-06-09 |
Word line selector for a semiconductor memory
Grant 6,865,114 - Pio March 8, 2 | 2005-03-08 |
Electronic memory circuit and related manufacturing method
Grant 6,852,596 - Pio February 8, 2 | 2005-02-08 |
Electrically modifiable, non-volatile, semiconductor memory which can keep a datum stored until an operation to modify the datum is completed
Grant 6,839,818 - Gastaldi , et al. January 4, 2 | 2005-01-04 |
Method of manufacturing an integrated semiconductor device having a plurality of connection levels
Grant 6,815,328 - Pio November 9, 2 | 2004-11-09 |
Method of adjusting program voltage in non-volatile memories, and process for fabricating a non-volatile memory device
Grant 6,803,630 - Pio , et al. October 12, 2 | 2004-10-12 |
Field-effect transistor and corresponding manufacturing method
Grant 6,737,715 - Pio , et al. May 18, 2 | 2004-05-18 |
Non-volatile high-performance memory device and relative manufacturing process
Grant 6,677,206 - Patelmo , et al. January 13, 2 | 2004-01-13 |
Method for refreshing stored data in an electrically erasable and programmable non-volatile memory
Grant 6,668,303 - Pio December 23, 2 | 2003-12-23 |
Method of erasing a flash memory
Grant 6,643,184 - Pio November 4, 2 | 2003-11-04 |
Circuit structure with a parasitic transistor having high threshold voltage
Grant 6,642,582 - Libera , et al. November 4, 2 | 2003-11-04 |
Word line selector for a semiconductor memory
App 20030198101 - Pio, Federico | 2003-10-23 |
Non-volatile, electrically alterable semiconductor memory
Grant 6,618,315 - Pio , et al. September 9, 2 | 2003-09-09 |
Method of adjusting program voltage in non-volatile memories, and process for fabricating a non-volatile memory device
App 20030165075 - Pio, Federico ; et al. | 2003-09-04 |
EEPROM memory cell and corresponding manufacturing method
Grant 6,548,355 - Pio April 15, 2 | 2003-04-15 |
Non-volatile, electrically alterable semiconductor memory
App 20020154546 - Pio, Federico ; et al. | 2002-10-24 |
Electrically modifiable, non-volatile, semiconductor memory which can keep a datum stored until an operation to modify the datum is completed
App 20020130334 - Gastaldi, Roberto ; et al. | 2002-09-19 |
Method for refreshing stored data in an electrically erasable and programmable non-volatile memory
App 20020116592 - Pio, Federico | 2002-08-22 |
Method of erasing a flash memory
App 20020114193 - Pio, Federico | 2002-08-22 |
Field-effect transistor and corresponding manufacturing method
App 20020089006 - Pio, Federico ; et al. | 2002-07-11 |
Method of manufacturing an integrated semiconductor device having a plurality of connection levels
App 20020055249 - Pio, Federico | 2002-05-09 |
Process for the manufacture of integrated devices with gate oxide protection from manufacturing process damage, and protection structure therefor
App 20010036707 - Patelmo, Matteo ; et al. | 2001-11-01 |
Non-volatile high-performance memory device and relative manufacturing process
App 20010030335 - Patelmo, Matteo ; et al. | 2001-10-18 |
Process for producing a semiconductor memory device comprising mass-storage memory cells and shielded memory cells for storing reserved information
App 20010025980 - Bottini, Roberta ; et al. | 2001-10-04 |
Electronic structure comprising high and low voltage transistors, and a corresponding fabrication method
App 20010019157 - Pio, Federico ; et al. | 2001-09-06 |
Process for the manufacture of integrated devices with gate oxide protection from manufacturing process damage, and protection structure therefor
Grant 6,278,159 - Patelmo , et al. August 21, 2 | 2001-08-21 |
Electronic memory circuit and related manufacturing method
App 20010007536 - Pio, Federico | 2001-07-12 |
Non-volatile memory structure and corresponding manufacturing process
App 20010005333 - Libera, Giovanna Dalla ; et al. | 2001-06-28 |
Nonvolatile Semiconductor Memory Device Structure With Superimposed Bit Lines And Short-circuit Metal Strips
App 20010001492 - ZATELLI, NICOLA ; et al. | 2001-05-24 |
EEPROM memory cell and corresponding manufacturing method
App 20010001294 - Pio, Federico | 2001-05-17 |
Screened EEPROM cell
Grant 6,151,245 - Pio , et al. November 21, 2 | 2000-11-21 |
Nonvolatile memory test structure and nonvolatile memory reliability test method
Grant 6,128,219 - Pio , et al. October 3, 2 | 2000-10-03 |
EEPROM memory cells matrix with double polysilicon level and relating manufacturing process
Grant 5,894,146 - Pio , et al. April 13, 1 | 1999-04-13 |
Double polysilicon EEPROM cell and corresponding manufacturing process and programming method
Grant 5,793,673 - Pio , et al. August 11, 1 | 1998-08-11 |
Circuit structure for a memory matrix and corresponding manufacturing method
Grant 5,677,871 - Pio , et al. October 14, 1 | 1997-10-14 |
Method and device for supplying negative programming voltages to non-volatile memory cells in a non-volatile memory device
Grant 5,659,501 - Baldi , et al. August 19, 1 | 1997-08-19 |
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