Pintchovski; Faivel
Patent Applications and Registrations
Patent applications and USPTO patent grants for Pintchovski; Faivel.The latest application filed is for "nano-electrode-array for integrated circuit interconnects".
- Pintchovski; Faivel - Austin TX
| Patent | Date |
|---|---|
| Barrier material formation in integrated circuit structures Grant 7,446,416 - Fiordalice , et al. November 4, 2 | 2008-11-04 |
| Nano-electrode-array For Integrated Circuit Interconnects App 20070284746 - Lopatin; Sergey D. ; et al. | 2007-12-13 |
| Nano-electrode-array for integrated circuit interconnects Grant 7,226,856 - Lopatin , et al. June 5, 2 | 2007-06-05 |
| Barrier enhancement App 20050212138 - Fiordalice, Robert W. ; et al. | 2005-09-29 |
| Barrier enhancement Grant 6,949,457 - Fiordalice , et al. September 27, 2 | 2005-09-27 |
| Self-aligned complementary HFETS Grant 5,411,903 - Wu , et al. May 2, 1 | 1995-05-02 |
| Process for the selective encapsulation of an electrically conductive structure in a semiconductor device Grant 5,126,283 - Pintchovski , et al. June 30, 1 | 1992-06-30 |
| Method for making a w/tin contact Grant 4,822,753 - Pintchovski , et al. April 18, 1 | 1989-04-18 |
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