loadpatents
name:-0.010010004043579
name:-0.016451120376587
name:-0.00086808204650879
Pilling; David J. Patent Filings

Pilling; David J.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Pilling; David J..The latest application filed is for "lead frame package".

Company Profile
0.13.8
  • Pilling; David J. - Los Altos Hills CA
  • Pilling; David J - Los Altos Hills CA
  • Pilling, David J. - US
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Lead frame package
Grant 8,294,249 - Pilling , et al. October 23, 2
2012-10-23
Behavioral modeling of high speed differential signals based on physical characteristics
Grant 8,041,552 - Pilling October 18, 2
2011-10-18
Lead Frame Package
App 20100032818 - Pilling; David J. ;   et al.
2010-02-11
In-situ monitor of process and device parameters in integrated circuits
Grant 7,594,149 - Pilling September 22, 2
2009-09-22
In-situ monitor of process and device parameters in integrated circuits
Grant 7,583,087 - Pilling , et al. September 1, 2
2009-09-01
High-speed, low-power level shifter for mixed signal-level environments
Grant 7,554,379 - Pilling , et al. June 30, 2
2009-06-30
Circuits and methods that attenuate coupled noise
Grant 7,518,842 - Pilling , et al. April 14, 2
2009-04-14
Behavioral modeling of high speed differential signals based on physical characteristics
App 20080255820 - Pilling; David J.
2008-10-16
High-performance level shifter
App 20080204109 - Pilling; David J. ;   et al.
2008-08-28
Integrated circuit systems and devices having high precision digital delay lines therein
Grant 7,203,126 - Proebsting , et al. April 10, 2
2007-04-10
In-situ monitor of process and device parameters in integrated circuits
App 20060190785 - Pilling; David J.
2006-08-24
In-situ monitor of process and device parameters in integrated circuits
App 20060190790 - Pilling; David J. ;   et al.
2006-08-24
Integrated circuit systems and devices having high precision digital delay lines therein
App 20050206426 - Proebsting, Robert J. ;   et al.
2005-09-22
Integrated circuit devices having high precision digital delay lines therein
Grant 6,944,070 - Proebsting , et al. September 13, 2
2005-09-13
Circuits and methods that attenuate coupled noise
App 20050128664 - Pilling, David J. ;   et al.
2005-06-16
Integrated circuit devices having high precision digital delay lines therein
Grant 6,856,558 - Proebsting , et al. February 15, 2
2005-02-15
Multi-phase clock generators that utilize differential signals to achieve reduced setup and hold times
Grant 6,700,425 - Pilling March 2, 2
2004-03-02
Flip-flops And Clock Generators That Utilize Differential Signals To Achieve Reduced Setup Times And Clock Latency
App 20030080793 - Pilling, David J.
2003-05-01
Output driver circuit for high speed digital signal transmission
Grant 6,130,563 - Pilling , et al. October 10, 2
2000-10-10
Redundancy circuit for programmable integrated circuits
Grant 5,818,778 - Lui , et al. October 6, 1
1998-10-06
Memories and amplifiers suitable for low voltage power supplies
Grant 5,325,335 - Ang , et al. June 28, 1
1994-06-28

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