Pi; Tao

Patent Applications and Registrations

Patent applications and USPTO patent grants for Pi; Tao.The latest application filed is for "capacitive fingerprint sensor".

Company Profile

3.13.7

Pi; Tao - Shenzhen CN
Pi; Tao - Guangdong CN
Pi; Tao - San Jose CA US
Pi; Tao - Sunnyvale CA
Pi; Tao - Santa Clara CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Capacitive fingerprint sensor Grant 10,366,270 - Zhang , et al. July 30, 2	2019-07-30
Capacitive fingerprint sensor Grant 10,360,429 - Zhang , et al.	2019-07-23
Conversion circuit and detection circuit Grant 10,349,848 - Pi , et al. July 16, 2	2019-07-16
Capacitive Fingerprint Sensor App 20180121700 - ZHANG; Mengwen ; et al.	2018-05-03
Capacitive Fingerprint Sensor App 20180121699 - ZHANG; Mengwen ; et al.	2018-05-03
Conversion Circuit And Detection Circuit App 20170360315 - PI; Tao ; et al.	2017-12-21
Strobe signal management to clock data into a system Grant 8,446,195 - Swanson , et al. May 21, 2	2013-05-21
Dynamic detection of a strobe signal within an integrated circuit Grant 8,270,235 - Swanson , et al. September 18, 2	2012-09-18
Strobe Signal Management To Clock Data Into A System App 20110298511 - Swanson; Richard W. ; et al.	2011-12-08
Dynamic Detection Of A Strobe Signal Within An Integrated Circuit App 20110299347 - Swanson; Richard W. ; et al.	2011-12-08
Structure for the main oscillator of a counter-controlled delay line Grant 7,477,112 - Pi , et al. January 13, 2	2009-01-13
Programmable logic device having heterogeneous programmable logic blocks Grant 7,046,034 - Crotty , et al. May 16, 2	2006-05-16
Programmable logic device having heterogeneous programmable logic blocks Grant 6,970,012 - Crotty , et al. November 29, 2	2005-11-29
Programmable logic device having heterogeneous programmable logic blocks App 20050231235 - Crotty, Patrick J. ; et al.	2005-10-20
Carry logic design having simplified timing modeling for a field programmable gate array Grant 6,847,228 - Crotty , et al. January 25, 2	2005-01-25
Method and apparatus for reducing jitter and power dissipation in a delay line Grant 6,847,246 - Kaviani , et al. January 25, 2	2005-01-25
FPGA lookup table with transmission gate structure for reliable low-voltage operation Grant 6,809,552 - Pi , et al. October 26, 2	2004-10-26
Programmable Logic Device Having Heterogeneous Programmable Logic Blocks App 20040178818 - Crotty, Patrick J. ; et al.	2004-09-16
FPGA lookup table with transmission gate structure for reliable low-voltage operation Grant 6,667,635 - Pi , et al. December 23, 2	2003-12-23

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