loadpatents
name:-0.017148971557617
name:-0.022448062896729
name:-0.00046205520629883
Phelps; Andrew E. Patent Filings

Phelps; Andrew E.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Phelps; Andrew E..The latest application filed is for "system and method for determining a global ordering of events using timestamps".

Company Profile
0.29.11
  • Phelps; Andrew E. - Encinitas CA
  • Phelps; Andrew E. - Eau Claire WI
  • Phelps; Andrew E. - San Diego CA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Pipeline structure for a shared memory protocol
Grant 8,028,130 - Weiss , et al. September 27, 2
2011-09-27
System and method for determining a global ordering of events using timestamps
Grant 7,251,748 - Liberty , et al. July 31, 2
2007-07-31
Computer system including a memory controller configured to perform pre-fetch operations
Grant 7,055,016 - Phelps , et al. May 30, 2
2006-05-30
Inter-domain data transfer
Grant 7,020,753 - Shanahan , et al. March 28, 2
2006-03-28
Victim invalidation
Grant 6,961,827 - Shanahan , et al. November 1, 2
2005-11-01
System design verification using selected states of a processor-based system to reveal deficiencies
Grant 6,920,584 - Phelps , et al. July 19, 2
2005-07-19
Method and apparatus for arbitrating transactions between domains in a computer system
Grant 6,915,450 - Phelps , et al. July 5, 2
2005-07-05
System domain targeted, configurable interconnection
Grant 6,898,728 - Drogichen , et al. May 24, 2
2005-05-24
Method and apparatus for providing error isolation in a multi-domain computer system
Grant 6,877,108 - Kane , et al. April 5, 2
2005-04-05
Dynamically reconfigurable interconnection
Grant 6,871,294 - Phelps , et al. March 22, 2
2005-03-22
System and method for determining a global ordering of events using timestamps
App 20050060619 - Liberty, Dean A. ;   et al.
2005-03-17
Computer system including a memory controller configured to perform pre-fetch operations
App 20040221111 - Phelps, Andrew E. ;   et al.
2004-11-04
Computer system employing multiple board sets and coherence schemes
Grant 6,721,852 - Shanahan , et al. April 13, 2
2004-04-13
Inter-domain data transfer
App 20030131213 - Shanahan, Patricia ;   et al.
2003-07-10
Cage for dynamic attach testing of I/O boards
Grant 6,571,360 - Drogichen , et al. May 27, 2
2003-05-27
Victim invalidation
App 20030093722 - Shanahan, Patricia ;   et al.
2003-05-15
Design verification
App 20030088808 - Phelps, Andrew E. ;   et al.
2003-05-08
Method and apparatus for arbitrating transactions between domains in a computer system
App 20030084373 - Phelps, Andrew E. ;   et al.
2003-05-01
Updating directory cache
App 20030079086 - Shanahan, Patricia ;   et al.
2003-04-24
System domain targeted, configurable interconnection
App 20030061534 - Drogichen, Daniel P. ;   et al.
2003-03-27
Dynamically reconfigurable interconnection
App 20030061476 - Phelps, Andrew E. ;   et al.
2003-03-27
Method and apparatus for providing error isolation in a multi-domain computer system
App 20030061538 - Kane, Donald ;   et al.
2003-03-27
Method for interleaving memory
App 20030046501 - Schulz, Jurgen M. ;   et al.
2003-03-06
Snoop filter for use in multiprocessor computer systems
Grant 5,966,729 - Phelps October 12, 1
1999-10-12
Partitioned addressing apparatus for vector/scalar registers
Grant 5,745,721 - Beard , et al. April 28, 1
1998-04-28
Method and apparatus for chaining vector instructions
Grant 5,640,524 - Beard , et al. June 17, 1
1997-06-17
Vector processor having registers for control by vector resisters
Grant 5,544,337 - Beard , et al. August 6, 1
1996-08-06
Method and apparatus for accessing global registers in a multiprocessor system
Grant 5,524,255 - Beard , et al. June 4, 1
1996-06-04
Method and apparatus for a multiprocessor resource lockout instruction
Grant 5,499,356 - Eckert , et al. March 12, 1
1996-03-12
Scalar/vector processor
Grant 5,430,884 - Beard , et al. July 4, 1
1995-07-04
Dedicated centralized signaling mechanism for selectively signaling devices in a multiprocessor system
Grant 5,239,629 - Miller , et al. August 24, 1
1993-08-24
Method and apparatus for non-sequential resource access
Grant 5,208,914 - Wilson , et al. May 4, 1
1993-05-04
Fast interrupt mechanism for interrupting processors in parallel in a multiprocessor system wherein processors are assigned process ID numbers
Grant 5,193,187 - Strout, II , et al. March 9, 1
1993-03-09
Method and apparatus for a special purpose arithmetic boolean unit
Grant 5,175,862 - Phelps , et al. December 29, 1
1992-12-29
Method and apparatus for a multiple request toggling priority system
Grant 5,168,570 - Eckert , et al. December 1, 1
1992-12-01
Global registers for a multiprocessor system
Grant 5,165,038 - Beard , et al. November 17, 1
1992-11-17
Linking scalar results directly to scalar operation inputs on a bidirectional databus in a computer which superpositions vector and scalar operations
Grant 4,837,730 - Cook , et al. June 6, 1
1989-06-06
Bi-directional databus system for supporting superposition of vector and scalar operations in a computer
Grant 4,760,518 - Potash , et al. July 26, 1
1988-07-26
Address translation buffer
Grant 4,538,241 - Levin , et al. August 27, 1
1985-08-27
Content addressable memory cell with shift capability
Grant 4,532,606 - Phelps July 30, 1
1985-07-30

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