| Patent | Date |
|---|
Semiconductor device having electrically coupled transistors with a differential current gain
Grant 5,616,948 - Pfiester April 1, 1 | 1997-04-01 |
Semiconductor device having a buried channel transistor
Grant 5,536,962 - Pfiester July 16, 1 | 1996-07-16 |
Semiconductor memory cell and fabrication process
Grant 5,459,688 - Pfiester , et al. October 17, 1 | 1995-10-17 |
Method for forming electrical isolation in an integrated circuit
Grant 5,422,300 - Pfiester , et al. * June 6, 1 | 1995-06-06 |
Method for forming a dual transistor structure
Grant 5,413,948 - Pfiester , et al. May 9, 1 | 1995-05-09 |
Method for fabricating a semiconductor device having a shallow doped region
Grant 5,407,847 - Hayden , et al. April 18, 1 | 1995-04-18 |
Method for forming a metal silicide interconnect in an integrated circuit
Grant 5,405,806 - Pfiester , et al. April 11, 1 | 1995-04-11 |
Semiconductor memory device having a compact symmetrical layout
Grant 5,373,170 - Pfiester , et al. December 13, 1 | 1994-12-13 |
Method for fabricating paired MOS transistors having a current-gain differential
Grant 5,371,026 - Hayden , et al. December 6, 1 | 1994-12-06 |
Method for forming electrical isolation in an integrated circuit device
Grant 5,371,035 - Pfiester , et al. December 6, 1 | 1994-12-06 |
Method of forming dual field oxide isolation
Grant 5,369,052 - Kenkare , et al. November 29, 1 | 1994-11-29 |
Method for forming a transistor having silicided regions
Grant 5,352,631 - Sitaram , et al. October 4, 1 | 1994-10-04 |
Process for fabricating a semiconductor memory cell having thin-film driver transistors overlapping dual wordlines
Grant 5,348,903 - Pfiester , et al. September 20, 1 | 1994-09-20 |
Semiconductor memory cell
Grant 5,334,861 - Pfiester , et al. August 2, 1 | 1994-08-02 |
Method of making a six transistor static random access memory cell
Grant 5,330,929 - Pfiester , et al. July 19, 1 | 1994-07-19 |
Dual-transistor structure and method of formation
Grant 5,324,960 - Pfiester , et al. June 28, 1 | 1994-06-28 |
Transistor having a lightly doped region
Grant 5,319,232 - Pfiester June 7, 1 | 1994-06-07 |
CMOS device and process
Grant 5,268,590 - Pfiester , et al. December 7, 1 | 1993-12-07 |
Method of making an MOS transistor having improved transconductance and short channel characteristics
Grant 5,264,380 - Pfiester November 23, 1 | 1993-11-23 |
Semiconductor device having a thin-film transistor and process
Grant 5,241,193 - Pfiester , et al. August 31, 1 | 1993-08-31 |
Method of forming oxide isolation
Grant 5,236,862 - Pfiester , et al. August 17, 1 | 1993-08-17 |
Method for forming isolation regions in a semiconductor device
Grant 5,212,110 - Pfiester , et al. May 18, 1 | 1993-05-18 |
Method of making dynamic random access memory cell having a trench capacitor
Grant 5,204,281 - Pfiester April 20, 1 | 1993-04-20 |
Transistor having a lightly doped region and method of formation
Grant 5,200,352 - Pfiester April 6, 1 | 1993-04-06 |
Semiconductor device having an MOS transistor with overlapped and elevated source and drain
Grant 5,182,619 - Pfiester January 26, 1 | 1993-01-26 |
Process for fabricating a silicon on insulator field effect transistor
Grant 5,166,084 - Pfiester November 24, 1 | 1992-11-24 |
Semiconductor device process using diffusant penetration and source layers for shallow regions
Grant 5,141,895 - Pfiester , et al. August 25, 1 | 1992-08-25 |
Method of fabricating MOS transistors using selective polysilicon deposition
Grant 5,082,794 - Pfiester , et al. January 21, 1 | 1992-01-21 |
Shared gate CMOS transistor
Grant 5,083,190 - Pfiester January 21, 1 | 1992-01-21 |
Semiconductor process using selective deposition
Grant 5,070,029 - Pfiester , et al. December 3, 1 | 1991-12-03 |
Insulated gate field effect device
Grant 5,047,812 - Pfiester September 10, 1 | 1991-09-10 |
CMOS process using doped glass layer
Grant 5,024,959 - Pfiester June 18, 1 | 1991-06-18 |
Process for manufacturing a semiconductor device
Grant 5,021,354 - Pfiester June 4, 1 | 1991-06-04 |
Shared gate CMOS transistor
Grant 4,997,785 - Pfiester March 5, 1 | 1991-03-05 |
Short channel IGFET process
Grant 4,992,388 - Pfiester February 12, 1 | 1991-02-12 |
MOS transistors using selective polysilicon deposition
Grant 4,984,042 - Pfiester , et al. January 8, 1 | 1991-01-08 |
LDD transistor process having doping sensitive endpoint etching
Grant 4,978,626 - Poon , et al. December 18, 1 | 1990-12-18 |
Contact structure and method
Grant 4,966,864 - Pfiester October 30, 1 | 1990-10-30 |
Method of making an integrated circuit resistor
Grant 4,948,747 - Pfiester August 14, 1 | 1990-08-14 |
Self-aligned trench with selective trench fill
Grant 4,942,137 - Sivan , et al. July 17, 1 | 1990-07-17 |
N-channel MOS transistors having source/drain regions with germanium
Grant 4,928,156 - Alvis , et al. May 22, 1 | 1990-05-22 |
Compact CMOS device structure
Grant 4,918,510 - Pfiester April 17, 1 | 1990-04-17 |
Salicided source/drain structure
Grant 4,876,213 - Pfiester October 24, 1 | 1989-10-24 |
EPROM device using asymmetrical transistor characteristics
Grant 4,852,062 - Baker , et al. July 25, 1 | 1989-07-25 |
Process for providing isolation between CMOS devices
Grant 4,847,213 - Pfiester July 11, 1 | 1989-07-11 |
N-channel MOS transistors having source/drain regions with germanium
Grant 4,837,173 - Alvis , et al. June 6, 1 | 1989-06-06 |
CMOS salicide process using germanium implantation
Grant 4,835,112 - Pfiester , et al. May 30, 1 | 1989-05-30 |
Ram cell having trench sidewall load
Grant 4,835,589 - Pfiester May 30, 1 | 1989-05-30 |
Micron and submicron patterning without using a lithographic mask having submicron dimensions
Grant 4,812,418 - Pfiester , et al. March 14, 1 | 1989-03-14 |
Compact multi-state ROM cell
Grant 4,811,066 - Pfiester , et al. March 7, 1 | 1989-03-07 |
Adjusting threshold voltages by diffusion through refractory metal silicides
Grant 4,786,611 - Pfiester November 22, 1 | 1988-11-22 |
Forming a trench capacitor
Grant 4,761,385 - Pfiester August 2, 1 | 1988-08-02 |
Method for fabricating MOS transistors having gates with different work functions
Grant 4,745,079 - Pfiester May 17, 1 | 1988-05-17 |
Process of controlling surface doping
Grant 4,743,563 - Pfiester , et al. May 10, 1 | 1988-05-10 |
Field implant process for CMOS using germanium
Grant 4,728,619 - Pfiester , et al. March 1, 1 | 1988-03-01 |
Method for fabricating MOS transistors having gates with different work functions
Grant 4,714,519 - Pfiester December 22, 1 | 1987-12-22 |
Selective precharge circuit for read-only-memory
Grant 4,318,014 - McAlister , et al. March 2, 1 | 1982-03-02 |
IGFET Decode circuit using series-coupled transistors
Grant 4,292,547 - Pfiester , et al. September 29, 1 | 1981-09-29 |
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