loadpatents
name:-0.031383991241455
name:-0.02595591545105
name:-0.00069403648376465
Pfeiffer; Johann Patent Filings

Pfeiffer; Johann

Patent Applications and Registrations

Patent applications and USPTO patent grants for Pfeiffer; Johann.The latest application filed is for "memory having internal column counter for compression test mode".

Company Profile
0.26.27
  • Pfeiffer; Johann - Ottobrunn DE
  • Pfeiffer; Johann - Vienna AT
  • Pfeiffer, Johann - Wien AT
  • PFEIFFER, JOHANN - ALLENTSTEIG AT
  • Pfeiffer; Johann - Bretten DE
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Memory module with test structure
Grant 7,428,671 - Pfeiffer , et al. September 23, 2
2008-09-23
Method and auxiliary device for testing a RAM memory circuit
Grant 7,278,072 - Pfeiffer , et al. October 2, 2
2007-10-02
Integrated semiconductor memory with redundant memory cells replaceable for either true or complementary defective memory cells
Grant 7,236,412 - Proll , et al. June 26, 2
2007-06-26
Integrated circuit with a test circuit
Grant 7,135,723 - Szczpinski , et al. November 14, 2
2006-11-14
Memory having internal column counter for compression test mode
Grant 7,123,542 - Fekih-Romdhane , et al. October 17, 2
2006-10-17
Circuit device with clock pulse detection facility
Grant 7,068,079 - Schaefer , et al. June 27, 2
2006-06-27
Memory having internal column counter for compression test mode
App 20060133187 - Fekih-Romdhane; Khaled ;   et al.
2006-06-22
Digital memory circuit having a plurality of memory banks
Grant 7,064,999 - Fischer , et al. June 20, 2
2006-06-20
Semiconductor circuit and initialization method
Grant 6,989,707 - Von Keyserlingk , et al. January 24, 2
2006-01-24
Method and apparatus for reducing the current consumption of an electronic circuit
Grant 6,986,088 - Fischer , et al. January 10, 2
2006-01-10
Method for configuring a network termination unit
Grant 6,982,981 - Pfeiffer January 3, 2
2006-01-03
Integrated module having a delay element
Grant 6,975,131 - Szczypinski , et al. December 13, 2
2005-12-13
RAM memory circuit having a plurality of banks and an auxiliary device for testing
Grant 6,961,273 - Boldt , et al. November 1, 2
2005-11-01
Semiconductor memory with address decoding unit, and address loading method
Grant 6,937,537 - Pfeiffer , et al. August 30, 2
2005-08-30
Integrated semiconductor memory having redundant memory cells
App 20050174863 - Proll, Manfred ;   et al.
2005-08-11
RAM memory circuit and method for memory operation at a multiplied data rate
Grant 6,928,024 - Pfeiffer , et al. August 9, 2
2005-08-09
RAM memory circuit having a plurality of banks and an auxiliary device for testing
App 20050152194 - Boldt, Sven ;   et al.
2005-07-14
Integrated memory
Grant 6,917,563 - Lindstedt , et al. July 12, 2
2005-07-12
Semi-conductor component with clock relaying device
Grant 6,917,562 - Schaefer , et al. July 12, 2
2005-07-12
Semiconductor memory element with direct connection of the I/Os to the array logic
Grant 6,914,796 - Zuckerstatter , et al. July 5, 2
2005-07-05
Circuit and method for writing and reading data from a dynamic memory circuit
Grant 6,859,411 - Pfeiffer , et al. February 22, 2
2005-02-22
Integrated circuit having a voltage monitoring circuit and a method for monitoring an internal burn-in voltage
App 20040263216 - Proll, Manfred ;   et al.
2004-12-30
RAM memory circuit and method for controlling the same
Grant 6,822,923 - Pfeiffer , et al. November 23, 2
2004-11-23
Integrated module having a delay element
App 20040222811 - Szczypinski, Kazimierz ;   et al.
2004-11-11
Integrated circuit with a test circuit
App 20040217349 - Szczpinski, Kazimierz ;   et al.
2004-11-04
Memory module with test structure
App 20040153922 - Pfeiffer, Johann ;   et al.
2004-08-05
Semi-conductor component with clock relaying device
App 20040124886 - Schaefer, Andre ;   et al.
2004-07-01
Circuit device with clock pulse detection facility
App 20040124887 - Schaefer, Andre ;   et al.
2004-07-01
Integrated memory
App 20040109359 - Lindstedt, Reidar ;   et al.
2004-06-10
Semiconductor memory and method for operating the semiconductor memory
Grant 6,738,309 - Benedix , et al. May 18, 2
2004-05-18
Digital memory circuit having a plurality of memory banks
App 20040088613 - Fischer, Helmut ;   et al.
2004-05-06
Circuit for an electronic semiconductor module
Grant 6,731,131 - Pfeiffer , et al. May 4, 2
2004-05-04
RAM memory circuit and method for memory operation at a multiplied data rate
App 20040076040 - Pfeiffer, Johann ;   et al.
2004-04-22
Digital memory circuit having a plurality of memory areas
Grant 6,711,072 - Fischer , et al. March 23, 2
2004-03-23
Digital memory circuit having a plurality of segmented memory areas
Grant 6,711,085 - Fischer , et al. March 23, 2
2004-03-23
Circuit and method for writing and reading data from a dynamic memory circuit
App 20040027975 - Pfeiffer, Johann ;   et al.
2004-02-12
RAM memory circuit and method for controlling the same
App 20040008548 - Pfeiffer, Johann ;   et al.
2004-01-15
Semiconductor memory with address decoding unit, and address loading method
App 20030231535 - Pfeiffer, Johann ;   et al.
2003-12-18
Method and auxiliary device for testing a RAM memory circuit
App 20030217313 - Pfeiffer, Johann ;   et al.
2003-11-20
Circuit configuration and method for transmitting digital signals
App 20030215008 - Korotkov, Konstantin ;   et al.
2003-11-20
Semiconductor circuit and initialization method
App 20030197545 - Keyserlingk, Graf Albert Von ;   et al.
2003-10-23
Memory circuit having a plurality of memory areas
Grant 6,636,453 - Fischer , et al. October 21, 2
2003-10-21
Method and apparatus for reducing the current consumption of an electronic circuit
App 20030102881 - Fischer, Helmut ;   et al.
2003-06-05
Circuit for an electronic semiconductor module
App 20030080336 - Pfeiffer, Johann ;   et al.
2003-05-01
System for transmission of data
App 20030072311 - Pfeiffer, Johann
2003-04-17
Digital memory circuit having a plurality of memory areas
App 20030067821 - Fischer, Helmut ;   et al.
2003-04-10
Digital memory circuit having a plurality of segmented memory areas
App 20030067820 - Fischer, Helmut ;   et al.
2003-04-10
Method for accessing memory cells of a DRAM memory module
App 20030043654 - Pfeiffer, Johann ;   et al.
2003-03-06
Semiconductor memory and method for operating the semiconductor memory
App 20020176316 - Benedix, Alexander ;   et al.
2002-11-28
Memory circuit having a plurality of memory areas
App 20020163849 - Fischer, Helmut ;   et al.
2002-11-07
Method Of Bi-directional Data Transmission Over A Two-wire Line
App 20020031098 - PFEIFFER, JOHANN
2002-03-14
Method for processing signals for signal transmission in the base band
Grant 5,297,163 - Pfeiffer March 22, 1
1994-03-22
Plate heat exchanger
Grant 4,781,248 - Pfeiffer November 1, 1
1988-11-01

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