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name:-0.011548042297363
name:-0.012726068496704
name:-0.0046188831329346
Pfaff; Dirk Patent Filings

Pfaff; Dirk

Patent Applications and Registrations

Patent applications and USPTO patent grants for Pfaff; Dirk.The latest application filed is for "serdes receiver with optimized cdr pulse shaping".

Company Profile
5.11.12
  • Pfaff; Dirk - Ontario CA
  • Pfaff; Dirk - Ottawa CA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Multi-tap decision feed-forward equalizer with precursor and postcursor taps
Grant 11,398,933 - Palusa , et al. July 26, 2
2022-07-26
Serdes Receiver With Optimized Cdr Pulse Shaping
App 20220158878 - Palusa; Chaitanya ;   et al.
2022-05-19
SerDes receiver with optimized CDR pulse shaping
Grant 11,240,075 - Palusa , et al. February 1, 2
2022-02-01
Serdes Receiver With Optimized Cdr Pulse Shaping
App 20210218605 - Palusa; Chaitanya ;   et al.
2021-07-15
Multi-tap Decision Feed-forward Equalizer With Precursor And Postcursor Taps
App 20210160107 - Palusa; Chaitanya ;   et al.
2021-05-27
Multi-tap decision feed-forward equalizer with precursor and postcursor taps
Grant 10,911,272 - Palusa , et al. February 2, 2
2021-02-02
Serdes receiver with optimized CDR pulse shaping
Grant 10,904,044 - Palusa , et al. January 26, 2
2021-01-26
Line drivers for wireline transmission devices
Grant 10,868,506 - Wang , et al. December 15, 2
2020-12-15
Serdes Receiver With Optimized Cdr Pulse Shaping
App 20200252248 - Kind Code
2020-08-06
Multi-tap Decision Feed-forward Equalizer With Precursor And Postcursor Taps
App 20200252247 - Kind Code
2020-08-06
Line Drivers For Wireline Transmission Devices
App 20200067470 - WANG; Xin Jie ;   et al.
2020-02-27
Line drivers for wireline transmission devices
Grant 10,498,301 - Wang , et al. De
2019-12-03
Line Drivers For Wireline Transmission Devices
App 20190334492 - WANG; Xin Jie ;   et al.
2019-10-31
Delay locked loop
Grant 8,754,685 - Nummer , et al. June 17, 2
2014-06-17
Delay Locked Loop
App 20140145771 - NUMMER; Muhammad ;   et al.
2014-05-29
Linear phase interpolator and phase detector
Grant 8,218,705 - Yousefi Moghaddam , et al. July 10, 2
2012-07-10
Multiple reference phase locked loop
Grant 7,902,886 - Pfaff , et al. March 8, 2
2011-03-08
Programmable asynchronous first-in-first-out (FIFO) structure with merging capability
Grant 7,796,652 - Reitlingshoefer , et al. September 14, 2
2010-09-14
Voltage Controlled Oscillator (VCO) with a wide tuning range and substantially constant voltage swing over the tuning range
Grant 7,777,581 - Pfaff , et al. August 17, 2
2010-08-17
Multiple Reference Phase Locked Loop
App 20090115472 - PFAFF; Dirk ;   et al.
2009-05-07
Linear phase interpolator and phase detector
App 20090103675 - Yousefi Moghaddam; Gholamreza ;   et al.
2009-04-23
Voltage controlled oscillator (VCO) with a wide tuning range and substantially constant voltage swing over the tuning range
App 20090102525 - Pfaff; Dirk ;   et al.
2009-04-23
Programmable asynchronous first-in-first-out (FIFO) structure with merging capability
App 20070258491 - Reitlingshoefer; Claus ;   et al.
2007-11-08

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